From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Tue, 8 Jun 2021 15:10:18 +0000 (+0800)
Subject: ipq806x: Askey RT4230W REV6: use usual writing for pcie part
X-Git-Tag: v22.03.0-rc1~1891
X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=commitdiff_plain;h=269758a5bcea1376d037dfea62f161ff8562e489;hp=a73a8269e13f9387a2ac883dac7fe0dd49999ede

ipq806x: Askey RT4230W REV6: use usual writing for pcie part

The problem has been fixed in f47cb405cafd ("ipq806x: fix pci broken
on bootm command"), now the pcie part can be written in the usual way.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Ansuel Smith <ansuelsmth@gmail.com>
---

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
index 54356e2ff1..0ad2dfa57b 100644
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
@@ -294,14 +294,16 @@
 &pcie0 {
 	status = "okay";
 	reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
-	/delete-property/ perst-gpios;
+	pinctrl-0 = <&pcie0_pins>;
+	pinctrl-names = "default";
 };
 
 &pcie1 {
 	status = "okay";
 	reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
-	/delete-property/ perst-gpios;
-	force_gen1 = <1>;
+	pinctrl-0 = <&pcie1_pins>;
+	pinctrl-names = "default";
+	max-link-speed = <1>;
 };
 
 &ART {