From a22feb4c78f51716772738af84180d58bd877c45 Mon Sep 17 00:00:00 2001 From: Mathias Kresin Date: Sat, 21 May 2016 12:13:39 +0200 Subject: [PATCH] uboot-lantiq: VGV7510KW22 - use ddr ram params from brnboot Signed-off-by: Mathias Kresin --- ...PS-add-board-support-for-Arcadyan-VGV7510KW22.patch | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch b/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch index e46d374dc0..ccc3505a96 100644 --- a/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch +++ b/package/boot/uboot-lantiq/patches/0112-MIPS-add-board-support-for-Arcadyan-VGV7510KW22.patch @@ -166,9 +166,9 @@ @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2015 Martin Blumenstingl -+ * Based on code by: -+ * Daniel Schwierzeck, daniel.schwierzeck@googlemail.com -+ * and Lantiq Deutschland GmbH ++ * Copyright (C) 2016 Mathias Kresin ++ * ++ * The values have been extracted from original brnboot. + * + * SPDX-License-Identifier: GPL-2.0+ + */ @@ -204,7 +204,7 @@ +#define MC_CCR28_VALUE 0x0 +#define MC_CCR29_VALUE 0x0 +#define MC_CCR30_VALUE 0x798 -+#define MC_CCR31_VALUE 0x0 ++#define MC_CCR31_VALUE 0x2040F +#define MC_CCR32_VALUE 0x0 +#define MC_CCR33_VALUE 0x650000 +#define MC_CCR34_VALUE 0x200C8 @@ -220,7 +220,7 @@ +#define MC_CCR44_VALUE 0x566504 +#define MC_CCR45_VALUE 0x565F17 +#define MC_CCR46_VALUE 0x565F17 -+#define MC_CCR47_VALUE 0x0 ++#define MC_CCR47_VALUE 0x2040F +#define MC_CCR48_VALUE 0x0 +#define MC_CCR49_VALUE 0x0 +#define MC_CCR50_VALUE 0x0 -- 2.30.2