target/linux/ipq806x/patches-4.9/905-net-dsa-qca8k-add-destroy-hooks.patch

   1 From 4bfbe574825d41c12ca88c4f81b4e02e83710b6c Mon Sep 17 00:00:00 2001
   2 From: John Crispin <john@phrozen.org>
   3 Date: Tue, 1 Nov 2016 01:51:50 +0100
   4 Subject: [PATCH 19/22] net: dsa: qca8k: add destroy hooks
   5
   6 Reset the switch prior to a reboot.
   7
   8 Signed-off-by: John Crispin <john@phrozen.org>
   9 ---
  10  drivers/net/dsa/qca8k.c |   10 ++++++++++
  11  drivers/net/dsa/qca8k.h |    1 +
  12  2 files changed, 11 insertions(+)
  13
  14 Index: linux-4.9.34/drivers/net/dsa/qca8k.c
  15 ===================================================================
  16 --- linux-4.9.34.orig/drivers/net/dsa/qca8k.c
  17 +++ linux-4.9.34/drivers/net/dsa/qca8k.c
  18 @@ -672,6 +672,15 @@ qca8k_get_ethtool_stats(struct dsa_switc
  19         }
  20  }
  21
  22 +static void
  23 +qca8k_destroy(struct dsa_switch *ds)
  24 +{
  25 +       struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
  26 +
  27 +       qca8k_reg_set(priv, QCA8K_REG_MASK_CTRL,
  28 +                     QCA8K_MASK_CTRL_SW_RESET);
  29 +}
  30 +
  31  static int
  32  qca8k_get_sset_count(struct dsa_switch *ds)
  33  {
  34 @@ -1050,6 +1059,7 @@ static struct dsa_switch_ops qca8k_switc
  35         .get_sset_count         = qca8k_get_sset_count,
  36         .get_eee                = qca8k_get_eee,
  37         .set_eee                = qca8k_set_eee,
  38 +       .destroy                = qca8k_destroy,
  39         .port_enable            = qca8k_port_enable,
  40         .port_disable           = qca8k_port_disable,
  41         .port_stp_state_set     = qca8k_port_stp_state_set,
  42 Index: linux-4.9.34/drivers/net/dsa/qca8k.h
  43 ===================================================================
  44 --- linux-4.9.34.orig/drivers/net/dsa/qca8k.h
  45 +++ linux-4.9.34/drivers/net/dsa/qca8k.h
  46 @@ -30,9 +30,11 @@
  47
  48  /* Global control registers */
  49  #define QCA8K_REG_MASK_CTRL                            0x000
  50 +#define   QCA8K_MASK_CTRL_SW_RESET                     BIT(31)
  51  #define   QCA8K_MASK_CTRL_ID_M                         0xff
  52  #define   QCA8K_MASK_CTRL_ID_S                         8
  53  #define QCA8K_REG_PORT0_PAD_CTRL                       0x004
  54 +#define   QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG             BIT(31)
  55  #define QCA8K_REG_PORT5_PAD_CTRL                       0x008
  56  #define QCA8K_REG_PORT6_PAD_CTRL                       0x00c
  57  #define   QCA8K_PORT_PAD_RGMII_EN                      BIT(26)