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[openwrt/staging/chunkeey.git] / target / linux / ar7-2.6 / files / drivers / net / cpmac.c
1 /*
2 * $Id$
3 *
4 * Copyright (C) 2006, 2007 OpenWrt.org
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/moduleparam.h>
24
25 #include <linux/sched.h>
26 #include <linux/kernel.h> /* printk() */
27 #include <linux/slab.h>
28 #include <linux/errno.h>
29 #include <linux/types.h>
30 #include <linux/delay.h>
31 #include <linux/version.h>
32
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/skbuff.h>
37 #include <linux/mii.h>
38 #include <linux/phy.h>
39 #include <linux/platform_device.h>
40 #include <asm/ar7/ar7.h>
41 #include <asm/gpio.h>
42
43 MODULE_AUTHOR("Eugene Konev");
44 MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
45 MODULE_LICENSE("GPL");
46
47 /* Register definitions */
48 struct cpmac_control_regs {
49 volatile u32 revision;
50 volatile u32 control;
51 volatile u32 teardown;
52 volatile u32 unused;
53 };
54
55 struct cpmac_int_regs {
56 volatile u32 stat_raw;
57 volatile u32 stat_masked;
58 volatile u32 enable;
59 volatile u32 clear;
60 };
61
62 struct cpmac_stats {
63 volatile u32 good;
64 volatile u32 bcast;
65 volatile u32 mcast;
66 volatile u32 pause;
67 volatile u32 crc_error;
68 volatile u32 align_error;
69 volatile u32 oversized;
70 volatile u32 jabber;
71 volatile u32 undersized;
72 volatile u32 fragment;
73 volatile u32 filtered;
74 volatile u32 qos_filtered;
75 volatile u32 octets;
76 };
77
78 struct cpmac_regs {
79 struct cpmac_control_regs tx_ctrl;
80 struct cpmac_control_regs rx_ctrl;
81 volatile u32 unused1[56];
82 volatile u32 mbp;
83 /* MBP bits */
84 #define MBP_RXPASSCRC 0x40000000
85 #define MBP_RXQOS 0x20000000
86 #define MBP_RXNOCHAIN 0x10000000
87 #define MBP_RXCMF 0x01000000
88 #define MBP_RXSHORT 0x00800000
89 #define MBP_RXCEF 0x00400000
90 #define MBP_RXPROMISC 0x00200000
91 #define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16)
92 #define MBP_RXBCAST 0x00002000
93 #define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8)
94 #define MBP_RXMCAST 0x00000020
95 #define MBP_MCASTCHAN(chan) ((chan) & 0x7)
96 volatile u32 unicast_enable;
97 volatile u32 unicast_clear;
98 volatile u32 max_len;
99 volatile u32 buffer_offset;
100 volatile u32 filter_flow_threshold;
101 volatile u32 unused2[2];
102 volatile u32 flow_thre[8];
103 volatile u32 free_buffer[8];
104 volatile u32 mac_control;
105 #define MAC_TXPTYPE 0x00000200
106 #define MAC_TXPACE 0x00000040
107 #define MAC_MII 0x00000020
108 #define MAC_TXFLOW 0x00000010
109 #define MAC_RXFLOW 0x00000008
110 #define MAC_MTEST 0x00000004
111 #define MAC_LOOPBACK 0x00000002
112 #define MAC_FDX 0x00000001
113 volatile u32 mac_status;
114 #define MACST_QOS 0x4
115 #define MACST_RXFLOW 0x2
116 #define MACST_TXFLOW 0x1
117 volatile u32 emc_control;
118 volatile u32 unused3;
119 struct cpmac_int_regs tx_int;
120 volatile u32 mac_int_vector;
121 /* Int Status bits */
122 #define INTST_STATUS 0x80000
123 #define INTST_HOST 0x40000
124 #define INTST_RX 0x20000
125 #define INTST_TX 0x10000
126 volatile u32 mac_eoi_vector;
127 volatile u32 unused4[2];
128 struct cpmac_int_regs rx_int;
129 volatile u32 mac_int_stat_raw;
130 volatile u32 mac_int_stat_masked;
131 volatile u32 mac_int_enable;
132 volatile u32 mac_int_clear;
133 volatile u32 mac_addr_low[8];
134 volatile u32 mac_addr_mid;
135 volatile u32 mac_addr_high;
136 volatile u32 mac_hash_low;
137 volatile u32 mac_hash_high;
138 volatile u32 boff_test;
139 volatile u32 pac_test;
140 volatile u32 rx_pause;
141 volatile u32 tx_pause;
142 volatile u32 unused5[2];
143 struct cpmac_stats rx_stats;
144 struct cpmac_stats tx_stats;
145 volatile u32 unused6[232];
146 volatile u32 tx_ptr[8];
147 volatile u32 rx_ptr[8];
148 volatile u32 tx_ack[8];
149 volatile u32 rx_ack[8];
150
151 };
152
153 struct cpmac_mdio_regs {
154 volatile u32 version;
155 volatile u32 control;
156 #define MDIOC_IDLE 0x80000000
157 #define MDIOC_ENABLE 0x40000000
158 #define MDIOC_PREAMBLE 0x00100000
159 #define MDIOC_FAULT 0x00080000
160 #define MDIOC_FAULTDETECT 0x00040000
161 #define MDIOC_INTTEST 0x00020000
162 #define MDIOC_CLKDIV(div) ((div) & 0xff)
163 volatile u32 alive;
164 volatile u32 link;
165 struct cpmac_int_regs link_int;
166 struct cpmac_int_regs user_int;
167 u32 unused[20];
168 volatile u32 access;
169 #define MDIO_BUSY 0x80000000
170 #define MDIO_WRITE 0x40000000
171 #define MDIO_REG(reg) (((reg) & 0x1f) << 21)
172 #define MDIO_PHY(phy) (((phy) & 0x1f) << 16)
173 #define MDIO_DATA(data) ((data) & 0xffff)
174 volatile u32 physel;
175 };
176
177 /* Descriptor */
178 struct cpmac_desc {
179 u32 hw_next;
180 u32 hw_data;
181 u16 buflen;
182 u16 bufflags;
183 u16 datalen;
184 u16 dataflags;
185 /* Flags bits */
186 #define CPMAC_SOP 0x8000
187 #define CPMAC_EOP 0x4000
188 #define CPMAC_OWN 0x2000
189 #define CPMAC_EOQ 0x1000
190 u32 jiffies;
191 struct sk_buff *skb;
192 struct cpmac_desc *next;
193 };
194
195 struct cpmac_priv {
196 struct net_device_stats stats;
197 spinlock_t lock;
198 struct sk_buff *skb_pool;
199 int free_skbs;
200 struct cpmac_desc *rx_head, *rx_tail;
201 int tx_head, tx_tail;
202 struct cpmac_desc *desc_ring;
203 struct cpmac_regs *regs;
204 struct mii_bus *mii_bus;
205 struct phy_device *phy;
206 char phy_name[BUS_ID_SIZE];
207 struct plat_cpmac_data *config;
208 int oldlink, oldspeed, oldduplex;
209 u32 msg_enable;
210 struct net_device *dev;
211 struct work_struct alloc_work;
212 struct work_struct reset_work;
213 };
214
215 static irqreturn_t cpmac_irq(int, void *);
216 static int cpmac_stop(struct net_device *dev);
217 static int cpmac_open(struct net_device *dev);
218
219 #define CPMAC_LOW_THRESH 8
220 #define CPMAC_ALLOC_SIZE 32
221 #define CPMAC_SKB_SIZE 1536
222 #define CPMAC_TX_RING_SIZE 8
223 #define CPMAC_RX_RING_SIZE 16
224
225 #ifdef CPMAC_DEBUG
226 static void cpmac_dump_regs(u32 *base, int count)
227 {
228 int i;
229 for (i = 0; i < (count + 3) / 4; i++) {
230 if (i % 4 == 0) printk("\nCPMAC[0x%04x]:", i * 4);
231 printk(" 0x%08x", *(base + i));
232 }
233 printk("\n");
234 }
235 #endif
236
237 static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int regnum)
238 {
239 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
240 volatile u32 val;
241
242 while ((val = regs->access) & MDIO_BUSY);
243 regs->access = MDIO_BUSY | MDIO_REG(regnum & 0x1f) |
244 MDIO_PHY(phy_id & 0x1f);
245 while ((val = regs->access) & MDIO_BUSY);
246
247 return val & 0xffff;
248 }
249
250 static int cpmac_mdio_write(struct mii_bus *bus, int phy_id, int regnum, u16 val)
251 {
252 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
253 volatile u32 tmp;
254
255 while ((tmp = regs->access) & MDIO_BUSY);
256 regs->access = MDIO_BUSY | MDIO_WRITE |
257 MDIO_REG(regnum & 0x1f) | MDIO_PHY(phy_id & 0x1f) |
258 val;
259
260 return 0;
261 }
262
263 static int cpmac_mdio_reset(struct mii_bus *bus)
264 {
265 struct cpmac_mdio_regs *regs = (struct cpmac_mdio_regs *)bus->priv;
266
267 ar7_device_reset(AR7_RESET_BIT_MDIO);
268 regs->control = MDIOC_ENABLE |
269 MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1);
270
271 return 0;
272 }
273
274 static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, };
275
276 static struct mii_bus cpmac_mii = {
277 .name = "cpmac-mii",
278 .read = cpmac_mdio_read,
279 .write = cpmac_mdio_write,
280 .reset = cpmac_mdio_reset,
281 .irq = mii_irqs,
282 };
283
284 static int cpmac_config(struct net_device *dev, struct ifmap *map)
285 {
286 if (dev->flags & IFF_UP)
287 return -EBUSY;
288
289 /* Don't allow changing the I/O address */
290 if (map->base_addr != dev->base_addr)
291 return -EOPNOTSUPP;
292
293 /* ignore other fields */
294 return 0;
295 }
296
297 static int cpmac_set_mac_address(struct net_device *dev, void *addr)
298 {
299 struct sockaddr *sa = addr;
300
301 if (dev->flags & IFF_UP)
302 return -EBUSY;
303
304 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
305
306 return 0;
307 }
308
309 static void cpmac_set_multicast_list(struct net_device *dev)
310 {
311 struct dev_mc_list *iter;
312 int i;
313 int hash, tmp;
314 int hashlo = 0, hashhi = 0;
315 struct cpmac_priv *priv = netdev_priv(dev);
316
317 if(dev->flags & IFF_PROMISC) {
318 priv->regs->mbp &= ~MBP_PROMISCCHAN(0); /* promisc channel 0 */
319 priv->regs->mbp |= MBP_RXPROMISC;
320 } else {
321 priv->regs->mbp &= ~MBP_RXPROMISC;
322 if(dev->flags & IFF_ALLMULTI) {
323 /* enable all multicast mode */
324 priv->regs->mac_hash_low = 0xffffffff;
325 priv->regs->mac_hash_high = 0xffffffff;
326 } else {
327 for(i = 0, iter = dev->mc_list; i < dev->mc_count;
328 i++, iter = iter->next) {
329 hash = 0;
330 tmp = iter->dmi_addr[0];
331 hash ^= (tmp >> 2) ^ (tmp << 4);
332 tmp = iter->dmi_addr[1];
333 hash ^= (tmp >> 4) ^ (tmp << 2);
334 tmp = iter->dmi_addr[2];
335 hash ^= (tmp >> 6) ^ tmp;
336 tmp = iter->dmi_addr[4];
337 hash ^= (tmp >> 2) ^ (tmp << 4);
338 tmp = iter->dmi_addr[5];
339 hash ^= (tmp >> 4) ^ (tmp << 2);
340 tmp = iter->dmi_addr[6];
341 hash ^= (tmp >> 6) ^ tmp;
342 hash &= 0x3f;
343 if(hash < 32) {
344 hashlo |= 1<<hash;
345 } else {
346 hashhi |= 1<<(hash - 32);
347 }
348 }
349
350 priv->regs->mac_hash_low = hashlo;
351 priv->regs->mac_hash_high = hashhi;
352 }
353 }
354 }
355
356 static struct sk_buff *cpmac_get_skb(struct net_device *dev)
357 {
358 struct sk_buff *skb;
359 struct cpmac_priv *priv = netdev_priv(dev);
360
361 skb = priv->skb_pool;
362 if (likely(skb))
363 priv->skb_pool = skb->next;
364
365 if (likely(priv->free_skbs))
366 priv->free_skbs--;
367
368 if (priv->free_skbs < CPMAC_LOW_THRESH)
369 schedule_work(&priv->alloc_work);
370
371 return skb;
372 }
373
374 static void cpmac_rx(struct net_device *dev, int channel)
375 {
376 char *data;
377 struct sk_buff *skb;
378 struct cpmac_desc *desc;
379 struct cpmac_desc *start;
380 struct cpmac_priv *priv = netdev_priv(dev);
381
382 spin_lock(&priv->lock);
383 if (unlikely(!priv->rx_head))
384 return;
385
386
387 desc = priv->rx_tail->next;
388 dma_cache_inv((u32)desc, 16);
389
390 start = priv->rx_tail;
391 while((desc->dataflags & CPMAC_OWN) == 0) {
392 priv->regs->rx_ack[0] = virt_to_phys(desc);
393 if (unlikely(!desc->datalen)) {
394 if (printk_ratelimit())
395 printk(KERN_NOTICE "%s: rx: spurious interrupt\n",
396 dev->name);
397 priv->stats.rx_errors++;
398 goto out;
399 }
400
401 skb = cpmac_get_skb(dev);
402 if (likely(skb)) {
403 data = (char *)phys_to_virt(desc->hw_data);
404 dma_cache_inv((u32)data, desc->datalen);
405 skb_put(desc->skb, desc->datalen);
406 desc->skb->protocol = eth_type_trans(desc->skb, dev);
407 desc->skb->ip_summed = CHECKSUM_NONE;
408 priv->stats.rx_packets++;
409 priv->stats.rx_bytes += desc->datalen;
410 netif_rx(desc->skb);
411 desc->skb = skb;
412 } else {
413 if (printk_ratelimit())
414 printk(KERN_NOTICE "%s: rx: no free skbs, dropping packet\n",
415 dev->name);
416 priv->regs->rx_ptr[0] = virt_to_phys(desc);
417 priv->stats.rx_dropped++;
418 }
419 desc->hw_data = virt_to_phys(desc->skb->data);
420 desc->buflen = CPMAC_SKB_SIZE;
421 desc->dataflags = CPMAC_OWN;
422 desc->hw_next = 0;
423 dma_cache_wback((u32)desc, 16);
424
425 priv->rx_tail->hw_next = virt_to_phys(desc);
426 priv->rx_tail->dataflags = CPMAC_OWN;
427 dma_cache_wback((u32)priv->rx_tail, 16);
428
429 priv->rx_tail = desc;
430 desc = desc->next;
431 dma_cache_inv((u32)desc, 16);
432 if (start == desc) {
433 break;
434 }
435 }
436 out:
437 priv->rx_head = desc;
438 priv->regs->rx_ptr[0] = virt_to_phys(desc);
439 spin_unlock(&priv->lock);
440 }
441
442 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
443 static void
444 cpmac_alloc_skbs(struct work_struct *work)
445 {
446 struct cpmac_priv *priv = container_of(work, struct cpmac_priv,
447 alloc_work);
448 #else
449 static void
450 cpmac_alloc_skbs(void *data)
451 {
452 struct net_device *dev = (struct net_device*)data;
453 struct cpmac_priv *priv = netdev_priv(dev);
454 #endif
455 unsigned long flags;
456 int i, num_skbs = 0;
457 struct sk_buff *skb, *skbs = NULL;
458
459 for (i = 0; i < CPMAC_ALLOC_SIZE; i++) {
460 skb = alloc_skb(CPMAC_SKB_SIZE + 2, GFP_KERNEL);
461 if (!skb)
462 break;
463 skb->next = skbs;
464 skb_reserve(skb, 2);
465 skb->dev = priv->dev;
466 num_skbs++;
467 skbs = skb;
468 }
469
470 if (skbs) {
471 spin_lock_irqsave(&priv->lock, flags);
472 for (skb = priv->skb_pool; skb && skb->next; skb = skb->next);
473 if (!skb) {
474 priv->skb_pool = skbs;
475 } else {
476 skb->next = skbs;
477 }
478 priv->free_skbs += num_skbs;
479 spin_unlock_irqrestore(&priv->lock, flags);
480 #ifdef CPMAC_DEBUG
481 printk("%s: allocated %d skbs\n", priv->dev->name, num_skbs);
482 #endif
483 }
484 }
485
486 static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
487 {
488 unsigned long flags;
489 int len, chan;
490 struct cpmac_desc *desc;
491 struct cpmac_priv *priv = netdev_priv(dev);
492
493 len = skb->len;
494 if (unlikely(len < ETH_ZLEN)) {
495 if (unlikely(skb_padto(skb, ETH_ZLEN))) {
496 if (printk_ratelimit())
497 printk(KERN_NOTICE "%s: padding failed, dropping\n",
498 dev->name);
499 spin_lock_irqsave(&priv->lock, flags);
500 priv->stats.tx_dropped++;
501 spin_unlock_irqrestore(&priv->lock, flags);
502 return -ENOMEM;
503 }
504 len = ETH_ZLEN;
505 }
506 spin_lock_irqsave(&priv->lock, flags);
507 chan = priv->tx_tail++;
508 priv->tx_tail %= 8;
509 if (priv->tx_tail == priv->tx_head)
510 netif_stop_queue(dev);
511
512 desc = &priv->desc_ring[chan];
513 dma_cache_inv((u32)desc, 16);
514 if (desc->dataflags & CPMAC_OWN) {
515 printk(KERN_NOTICE "%s: tx dma ring full, dropping\n", dev->name);
516 spin_lock_irqsave(&priv->lock, flags);
517 priv->stats.tx_dropped++;
518 spin_unlock_irqrestore(&priv->lock, flags);
519 return -ENOMEM;
520 }
521
522 dev->trans_start = jiffies;
523 desc->jiffies = dev->trans_start;
524 spin_unlock_irqrestore(&priv->lock, flags);
525
526 desc->dataflags = CPMAC_SOP | CPMAC_EOP | CPMAC_OWN;
527 desc->skb = skb;
528 desc->hw_data = virt_to_phys(skb->data);
529 dma_cache_wback((u32)skb->data, len);
530 desc->buflen = len;
531 desc->datalen = len;
532 desc->hw_next = 0;
533 dma_cache_wback((u32)desc, 16);
534 priv->regs->tx_ptr[chan] = virt_to_phys(desc);
535 return 0;
536 }
537
538 static void cpmac_end_xmit(struct net_device *dev, int channel)
539 {
540 struct cpmac_desc *desc;
541 struct cpmac_priv *priv = netdev_priv(dev);
542
543 spin_lock(&priv->lock);
544 desc = &priv->desc_ring[channel];
545 priv->regs->tx_ack[channel] = virt_to_phys(desc);
546 if (likely(desc->skb)) {
547 priv->stats.tx_packets++;
548 priv->stats.tx_bytes += desc->skb->len;
549 dev_kfree_skb_irq(desc->skb);
550 if (priv->tx_head == channel) {
551 while ((desc->dataflags & CPMAC_OWN) == 0) {
552 priv->tx_head++;
553 priv->tx_head %= 8;
554 if (priv->tx_head == priv->tx_tail)
555 break;
556 desc = &priv->desc_ring[priv->tx_head];
557 }
558 }
559 if (netif_queue_stopped(dev))
560 netif_wake_queue(dev);
561 } else {
562 if (printk_ratelimit())
563 printk(KERN_NOTICE "%s: end_xmit: spurious interrupt\n",
564 dev->name);
565 }
566 spin_unlock(&priv->lock);
567 }
568
569 static void cpmac_reset(struct net_device *dev)
570 {
571 int i;
572 struct cpmac_priv *priv = netdev_priv(dev);
573
574 ar7_device_reset(priv->config->reset_bit);
575 priv->regs->rx_ctrl.control &= ~1;
576 priv->regs->tx_ctrl.control &= ~1;
577 for (i = 0; i < 8; i++) {
578 priv->regs->tx_ptr[i] = 0;
579 priv->regs->rx_ptr[i] = 0;
580 }
581 priv->regs->mac_control &= ~MAC_MII; /* disable mii */
582 }
583
584 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
585 static void
586 cpmac_full_reset(struct work_struct *work)
587 {
588 struct cpmac_priv *priv = container_of(work, struct cpmac_priv,
589 alloc_work);
590 struct net_device *dev = priv->dev;
591 #else
592 static void
593 cpmac_full_reset(void *data)
594 {
595 struct net_device *dev = (struct net_device*)data;
596 #endif
597
598 cpmac_stop(dev);
599 cpmac_open(dev);
600 }
601
602
603 static irqreturn_t cpmac_irq(int irq, void *dev_id)
604 {
605 struct net_device *dev = (struct net_device *)dev_id;
606 struct cpmac_priv *priv = netdev_priv(dev);
607 u32 status;
608
609 if (!dev)
610 return IRQ_NONE;
611
612 status = priv->regs->mac_int_vector;
613
614 if (status & INTST_TX) {
615 cpmac_end_xmit(dev, (status & 7));
616 }
617
618 if (status & INTST_RX) {
619 cpmac_rx(dev, (status >> 8) & 7);
620 }
621
622 if (unlikely(status & INTST_HOST)) { /* host interrupt ??? */
623 printk("%s: host int, something bad happened - mac status: 0x%08x\n", dev->name, priv->regs->mac_status);
624
625 /* try to recover */
626 cpmac_reset(dev);
627 schedule_work(&priv->reset_work);
628 }
629
630 if (unlikely(status & INTST_STATUS)) { /* status interrupt ??? */
631 printk("%s: status int, what are we gonna do?\n", dev->name);
632 }
633
634 priv->regs->mac_eoi_vector = 0;
635
636 return IRQ_HANDLED;
637 }
638
639 static void cpmac_tx_timeout(struct net_device *dev)
640 {
641 struct cpmac_priv *priv = netdev_priv(dev);
642 struct cpmac_desc *desc;
643
644 priv->stats.tx_errors++;
645 desc = &priv->desc_ring[priv->tx_head++];
646 priv->tx_head %= 8;
647 printk("Transmit timeout at %ld, latency %ld\n", jiffies,
648 jiffies - desc->jiffies);
649 if (desc->skb)
650 dev_kfree_skb(desc->skb);
651 netif_wake_queue(dev);
652 }
653
654 static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
655 {
656 struct cpmac_priv *priv = netdev_priv(dev);
657 if (!(netif_running(dev)))
658 return -EINVAL;
659 if (!priv->phy)
660 return -EINVAL;
661 return phy_mii_ioctl(priv->phy, if_mii(ifr), cmd);
662 }
663
664 static int cpmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
665 {
666 struct cpmac_priv *priv = netdev_priv(dev);
667
668 if (priv->phy)
669 return phy_ethtool_gset(priv->phy, cmd);
670
671 return -EINVAL;
672 }
673
674 static int cpmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
675 {
676 struct cpmac_priv *priv = netdev_priv(dev);
677
678 if (!capable(CAP_NET_ADMIN))
679 return -EPERM;
680
681 if (priv->phy)
682 return phy_ethtool_sset(priv->phy, cmd);
683
684 return -EINVAL;
685 }
686
687 static void cpmac_get_drvinfo(struct net_device *dev,
688 struct ethtool_drvinfo *info)
689 {
690 strcpy(info->driver, "cpmac");
691 strcpy(info->version, "0.0.3");
692 info->fw_version[0] = '\0';
693 sprintf(info->bus_info, "%s", "cpmac");
694 info->regdump_len = 0;
695 }
696
697 static const struct ethtool_ops cpmac_ethtool_ops = {
698 .get_settings = cpmac_get_settings,
699 .set_settings = cpmac_set_settings,
700 .get_drvinfo = cpmac_get_drvinfo,
701 .get_link = ethtool_op_get_link,
702 };
703
704 static struct net_device_stats *cpmac_stats(struct net_device *dev)
705 {
706 struct cpmac_priv *priv = netdev_priv(dev);
707
708 if (netif_device_present(dev))
709 return &priv->stats;
710
711 return NULL;
712 }
713
714 static int cpmac_change_mtu(struct net_device *dev, int mtu)
715 {
716 unsigned long flags;
717 struct cpmac_priv *priv = netdev_priv(dev);
718 spinlock_t *lock = &priv->lock;
719
720 if ((mtu < 68) || (mtu > 1500))
721 return -EINVAL;
722
723 spin_lock_irqsave(lock, flags);
724 dev->mtu = mtu;
725 spin_unlock_irqrestore(lock, flags);
726
727 return 0;
728 }
729
730 static void cpmac_adjust_link(struct net_device *dev)
731 {
732 struct cpmac_priv *priv = netdev_priv(dev);
733 unsigned long flags;
734 int new_state = 0;
735
736 spin_lock_irqsave(&priv->lock, flags);
737 if (priv->phy->link) {
738 if (priv->phy->duplex != priv->oldduplex) {
739 new_state = 1;
740 priv->oldduplex = priv->phy->duplex;
741 }
742
743 if (priv->phy->speed != priv->oldspeed) {
744 new_state = 1;
745 priv->oldspeed = priv->phy->speed;
746 }
747
748 if (!priv->oldlink) {
749 new_state = 1;
750 priv->oldlink = 1;
751 netif_schedule(dev);
752 }
753 } else if (priv->oldlink) {
754 new_state = 1;
755 priv->oldlink = 0;
756 priv->oldspeed = 0;
757 priv->oldduplex = -1;
758 }
759
760 if (new_state)
761 phy_print_status(priv->phy);
762
763 spin_unlock_irqrestore(&priv->lock, flags);
764 }
765
766 static int cpmac_open(struct net_device *dev)
767 {
768 int i, size, res;
769 struct cpmac_priv *priv = netdev_priv(dev);
770 struct cpmac_desc *desc;
771 struct sk_buff *skb;
772
773 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
774 priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link,
775 0, PHY_INTERFACE_MODE_MII);
776 #else
777 priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0);
778 #endif
779 if (IS_ERR(priv->phy)) {
780 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
781 return PTR_ERR(priv->phy);
782 }
783
784 if (!request_mem_region(dev->mem_start, dev->mem_end -
785 dev->mem_start, dev->name)) {
786 printk("%s: failed to request registers\n",
787 dev->name);
788 res = -ENXIO;
789 goto fail_reserve;
790 }
791
792 priv->regs = ioremap_nocache(dev->mem_start, dev->mem_end -
793 dev->mem_start);
794 if (!priv->regs) {
795 printk("%s: failed to remap registers\n", dev->name);
796 res = -ENXIO;
797 goto fail_remap;
798 }
799
800 priv->rx_head = NULL;
801 size = sizeof(struct cpmac_desc) * (CPMAC_RX_RING_SIZE +
802 CPMAC_TX_RING_SIZE);
803 priv->desc_ring = (struct cpmac_desc *)kmalloc(size, GFP_KERNEL);
804 if (!priv->desc_ring) {
805 res = -ENOMEM;
806 goto fail_alloc;
807 }
808
809 memset((char *)priv->desc_ring, 0, size);
810
811 priv->skb_pool = NULL;
812 priv->free_skbs = 0;
813 priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
814
815 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
816 INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs);
817 INIT_WORK(&priv->reset_work, cpmac_full_reset);
818 #else
819 INIT_WORK(&priv->alloc_work, cpmac_alloc_skbs, dev);
820 INIT_WORK(&priv->reset_work, cpmac_full_reset, dev);
821 #endif
822 schedule_work(&priv->alloc_work);
823 flush_scheduled_work();
824
825 for (i = 0; i < CPMAC_RX_RING_SIZE; i++) {
826 desc = &priv->rx_head[i];
827 skb = cpmac_get_skb(dev);
828 if (!skb) {
829 res = -ENOMEM;
830 goto fail_desc;
831 }
832 desc->skb = skb;
833 desc->hw_data = virt_to_phys(skb->data);
834 desc->buflen = CPMAC_SKB_SIZE;
835 desc->dataflags = CPMAC_OWN;
836 desc->next = &priv->rx_head[i + 1];
837 desc->hw_next = virt_to_phys(desc->next);
838 dma_cache_wback((u32)desc, 16);
839 }
840 priv->rx_tail = &priv->rx_head[CPMAC_RX_RING_SIZE - 1];
841 priv->rx_tail->next = priv->rx_head;
842 priv->rx_tail->hw_next = 0;
843
844 cpmac_reset(dev);
845 for (i = 0; i < 8; i++)
846 priv->regs->tx_ptr[i] = 0;
847 priv->regs->rx_ptr[0] = virt_to_phys(priv->rx_head);
848
849 priv->regs->mbp = MBP_RXSHORT | MBP_RXBCAST | MBP_RXMCAST;
850 priv->regs->unicast_enable = 0x1;
851 priv->regs->unicast_clear = 0xfe;
852 priv->regs->buffer_offset = 0;
853 for (i = 0; i < 8; i++)
854 priv->regs->mac_addr_low[i] = dev->dev_addr[5];
855 priv->regs->mac_addr_mid = dev->dev_addr[4];
856 priv->regs->mac_addr_high = dev->dev_addr[0] | (dev->dev_addr[1] << 8)
857 | (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
858 priv->regs->max_len = CPMAC_SKB_SIZE;
859 priv->regs->rx_int.enable = 0x1;
860 priv->regs->rx_int.clear = 0xfe;
861 priv->regs->tx_int.enable = 0xff;
862 priv->regs->tx_int.clear = 0;
863 priv->regs->mac_int_enable = 3;
864 priv->regs->mac_int_clear = 0xfc;
865
866 if((res = request_irq(dev->irq, cpmac_irq, SA_INTERRUPT,
867 dev->name, dev))) {
868 printk("%s: failed to obtain irq\n", dev->name);
869 goto fail_irq;
870 }
871
872 priv->regs->rx_ctrl.control |= 1;
873 priv->regs->tx_ctrl.control |= 1;
874 priv->regs->mac_control |= MAC_MII | MAC_FDX;
875
876 priv->phy->state = PHY_CHANGELINK;
877 phy_start(priv->phy);
878
879 netif_start_queue(dev);
880 return 0;
881
882 fail_irq:
883 fail_desc:
884 for (i = 0; i < CPMAC_RX_RING_SIZE; i++)
885 if (priv->rx_head[i].skb)
886 kfree_skb(priv->rx_head[i].skb);
887 fail_alloc:
888 kfree(priv->desc_ring);
889
890 for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
891 priv->skb_pool = skb->next;
892 kfree_skb(skb);
893 }
894
895 iounmap(priv->regs);
896
897 fail_remap:
898 release_mem_region(dev->mem_start, dev->mem_end -
899 dev->mem_start);
900
901 fail_reserve:
902 phy_disconnect(priv->phy);
903
904 return res;
905 }
906
907 static int cpmac_stop(struct net_device *dev)
908 {
909 int i;
910 struct sk_buff *skb;
911 struct cpmac_priv *priv = netdev_priv(dev);
912
913 netif_stop_queue(dev);
914
915 phy_stop(priv->phy);
916 phy_disconnect(priv->phy);
917 priv->phy = NULL;
918
919 cpmac_reset(dev);
920
921 for (i = 0; i < 8; i++) {
922 priv->regs->rx_ptr[i] = 0;
923 priv->regs->tx_ptr[i] = 0;
924 priv->regs->mbp = 0;
925 }
926
927 free_irq(dev->irq, dev);
928 release_mem_region(dev->mem_start, dev->mem_end -
929 dev->mem_start);
930
931 cancel_delayed_work(&priv->alloc_work);
932 flush_scheduled_work();
933
934 priv->rx_head = &priv->desc_ring[CPMAC_TX_RING_SIZE];
935 for (i = 0; i < CPMAC_RX_RING_SIZE; i++)
936 if (priv->rx_head[i].skb)
937 kfree_skb(priv->rx_head[i].skb);
938
939 kfree(priv->desc_ring);
940
941 for (skb = priv->skb_pool; skb; skb = priv->skb_pool) {
942 priv->skb_pool = skb->next;
943 kfree_skb(skb);
944 }
945
946 return 0;
947 }
948
949 static int external_switch = 0;
950
951 static int __devinit cpmac_probe(struct platform_device *pdev)
952 {
953 int i, rc, phy_id;
954 struct resource *res;
955 struct cpmac_priv *priv;
956 struct net_device *dev;
957 struct plat_cpmac_data *pdata;
958
959 if (strcmp(pdev->name, "cpmac") != 0)
960 return -ENODEV;
961
962 pdata = pdev->dev.platform_data;
963
964 for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
965 if (!(pdata->phy_mask & (1 << phy_id)))
966 continue;
967 if (!cpmac_mii.phy_map[phy_id])
968 continue;
969 break;
970 }
971
972 if (phy_id == PHY_MAX_ADDR) {
973 if (external_switch) {
974 phy_id = 0;
975 } else {
976 printk("cpmac: no PHY present\n");
977 return -ENODEV;
978 }
979 }
980
981 dev = alloc_etherdev(sizeof(struct cpmac_priv));
982
983 if (!dev) {
984 printk(KERN_ERR "cpmac: Unable to allocate net_device structure!\n");
985 return -ENOMEM;
986 }
987
988 SET_MODULE_OWNER(dev);
989 platform_set_drvdata(pdev, dev);
990 priv = netdev_priv(dev);
991
992 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
993 if (!res) {
994 rc = -ENODEV;
995 goto fail;
996 }
997
998 dev->mem_start = res->start;
999 dev->mem_end = res->end;
1000 dev->irq = platform_get_irq_byname(pdev, "irq");
1001
1002 dev->mtu = 1500;
1003 dev->open = cpmac_open;
1004 dev->stop = cpmac_stop;
1005 dev->set_config = cpmac_config;
1006 dev->hard_start_xmit = cpmac_start_xmit;
1007 dev->do_ioctl = cpmac_ioctl;
1008 dev->get_stats = cpmac_stats;
1009 dev->change_mtu = cpmac_change_mtu;
1010 dev->set_mac_address = cpmac_set_mac_address;
1011 dev->set_multicast_list = cpmac_set_multicast_list;
1012 dev->tx_timeout = cpmac_tx_timeout;
1013 dev->ethtool_ops = &cpmac_ethtool_ops;
1014
1015 memset(priv, 0, sizeof(struct cpmac_priv));
1016 spin_lock_init(&priv->lock);
1017 priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff);
1018 priv->config = pdata;
1019 priv->dev = dev;
1020 memcpy(dev->dev_addr, priv->config->dev_addr, sizeof(dev->dev_addr));
1021 if (phy_id == 31) {
1022 snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT,
1023 cpmac_mii.id, phy_id);
1024 } else {
1025 snprintf(priv->phy_name, BUS_ID_SIZE, "fixed@%d:%d", 100, 1);
1026 }
1027
1028 if ((rc = register_netdev(dev))) {
1029 printk("cpmac: error %i registering device %s\n",
1030 rc, dev->name);
1031 goto fail;
1032 }
1033
1034 printk("cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: ",
1035 dev->name, (u32 *)dev->mem_start, dev->irq,
1036 priv->phy_name);
1037 for (i = 0; i < 6; i++) {
1038 printk("%02x", dev->dev_addr[i]);
1039 if (i < 5) printk(":");
1040 else printk(")\n");
1041 }
1042
1043 return 0;
1044
1045 fail:
1046 free_netdev(dev);
1047 return rc;
1048 }
1049
1050 static int __devexit cpmac_remove(struct platform_device *pdev)
1051 {
1052 struct net_device *dev = platform_get_drvdata(pdev);
1053 unregister_netdev(dev);
1054 free_netdev(dev);
1055 return 0;
1056 }
1057
1058 static struct platform_driver cpmac_driver = {
1059 .driver.name = "cpmac",
1060 .probe = cpmac_probe,
1061 .remove = cpmac_remove,
1062 };
1063
1064 int __devinit cpmac_init(void)
1065 {
1066 volatile u32 mask;
1067 int i, res;
1068 cpmac_mii.priv = (struct cpmac_mdio_regs *)
1069 ioremap_nocache(AR7_REGS_MDIO, sizeof(struct cpmac_mdio_regs));
1070
1071 if (!cpmac_mii.priv) {
1072 printk("Can't ioremap mdio registers\n");
1073 return -ENXIO;
1074 }
1075
1076 #warning FIXME: unhardcode gpio&reset bits
1077 ar7_gpio_disable(26);
1078 ar7_gpio_disable(27);
1079 ar7_device_reset(17);
1080 ar7_device_reset(21);
1081 ar7_device_reset(26);
1082
1083 cpmac_mii.reset(&cpmac_mii);
1084
1085 for (i = 0; i < 300000; i++) {
1086 mask = ((struct cpmac_mdio_regs *)cpmac_mii.priv)->alive;
1087 if (mask)
1088 break;
1089 }
1090
1091 mask &= 0x7fffffff;
1092 if (mask & (mask - 1)) {
1093 external_switch = 1;
1094 mask = 0;
1095 }
1096
1097 cpmac_mii.phy_mask = ~(mask | 0x80000000);
1098
1099 res = mdiobus_register(&cpmac_mii);
1100 if (res)
1101 goto fail_mii;
1102
1103 res = platform_driver_register(&cpmac_driver);
1104 if (res)
1105 goto fail_cpmac;
1106
1107 return 0;
1108
1109 fail_cpmac:
1110 mdiobus_unregister(&cpmac_mii);
1111
1112 fail_mii:
1113 iounmap(cpmac_mii.priv);
1114
1115 return res;
1116 }
1117
1118 void __devexit cpmac_exit(void)
1119 {
1120 platform_driver_unregister(&cpmac_driver);
1121 mdiobus_unregister(&cpmac_mii);
1122 }
1123
1124 module_init(cpmac_init);
1125 module_exit(cpmac_exit);
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