target/linux/brcm2708/patches-4.14/950-0131-drm-vc4-Fix-pitch-setup-for-T-format-scanout.patch

   1 From 82f8b13481afeb2400bce276cf88a757fac87a21 Mon Sep 17 00:00:00 2001
   2 From: Eric Anholt <eric@anholt.net>
   3 Date: Fri, 14 Jul 2017 17:33:08 -0700
   4 Subject: [PATCH 131/454] drm/vc4: Fix pitch setup for T-format scanout.
   5
   6 The documentation said to use src_w here, and I didn't consider that
   7 we actually needed to be using pitch somewhere in our setup.  Fixes
   8 scanout on my DSI panel when X11 does initial setup with 1920x1080
   9 HDMI and 800x480 DSI both at 0,0 of the same framebuffer.
  10
  11 Signed-off-by: Eric Anholt <eric@anholt.net>
  12 Fixes: 98830d91da08 ("drm/vc4: Add T-format scanout support.")
  13 ---
  14  drivers/gpu/drm/vc4/vc4_plane.c | 20 +++++++++++++++-----
  15  1 file changed, 15 insertions(+), 5 deletions(-)
  16
  17 --- a/drivers/gpu/drm/vc4/vc4_plane.c
  18 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
  19 @@ -546,14 +546,24 @@ static int vc4_plane_mode_set(struct drm
  20                 tiling = SCALER_CTL0_TILING_LINEAR;
  21                 pitch0 = VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH);
  22                 break;
  23 -       case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
  24 +
  25 +       case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: {
  26 +               /* For T-tiled, the FB pitch is "how many bytes from
  27 +                * one row to the next, such that pitch * tile_h ==
  28 +                * tile_size * tiles_per_row."
  29 +                */
  30 +               u32 tile_size_shift = 12;
  31 +               u32 tile_h_shift = 5;
  32 +               u32 tiles_w = fb->pitches[0] >> (tile_size_shift - tile_h_shift);
  33 +
  34                 tiling = SCALER_CTL0_TILING_256B_OR_T;
  35
  36 -               pitch0 = (VC4_SET_FIELD(0, SCALER_PITCH0_TILE_Y_OFFSET),
  37 -                         VC4_SET_FIELD(0, SCALER_PITCH0_TILE_WIDTH_L),
  38 -                         VC4_SET_FIELD((vc4_state->src_w[0] + 31) >> 5,
  39 -                                       SCALER_PITCH0_TILE_WIDTH_R));
  40 +               pitch0 = (VC4_SET_FIELD(0, SCALER_PITCH0_TILE_Y_OFFSET) |
  41 +                         VC4_SET_FIELD(0, SCALER_PITCH0_TILE_WIDTH_L) |
  42 +                         VC4_SET_FIELD(tiles_w, SCALER_PITCH0_TILE_WIDTH_R));
  43                 break;
  44 +       }
  45 +
  46         default:
  47                 DRM_DEBUG_KMS("Unsupported FB tiling flag 0x%16llx",
  48                               (long long)fb->modifier);