edf85d6daeb9b4ef549bba0c41a5209424b011fc
[openwrt/staging/chunkeey.git] / target / linux / brcm2708 / patches-4.4 / 0261-clk-bcm2835-enable-management-of-PCM-clock.patch
1 From 817850fa2ab1a1b66ac1235b9dfe403d5efc8ac4 Mon Sep 17 00:00:00 2001
2 From: Martin Sperl <kernel@martin.sperl.org>
3 Date: Mon, 29 Feb 2016 12:51:43 +0000
4 Subject: [PATCH] clk: bcm2835: enable management of PCM clock
5
6 Enable the PCM clock in the SOC, which is used by the
7 bcm2835-i2s driver.
8
9 Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
10 Signed-off-by: Eric Anholt <eric@anholt.net>
11 Reviewed-by: Eric Anholt <eric@anholt.net>
12 (cherry picked from commit 33b689600f43094a9316a1b582f2286d17bc737b)
13 ---
14 drivers/clk/bcm/clk-bcm2835.c | 7 +++++++
15 include/dt-bindings/clock/bcm2835.h | 1 +
16 2 files changed, 8 insertions(+)
17
18 --- a/drivers/clk/bcm/clk-bcm2835.c
19 +++ b/drivers/clk/bcm/clk-bcm2835.c
20 @@ -1638,6 +1638,13 @@ static const struct bcm2835_clk_desc clk
21 .div_reg = CM_HSMDIV,
22 .int_bits = 4,
23 .frac_bits = 8),
24 + [BCM2835_CLOCK_PCM] = REGISTER_PER_CLK(
25 + .name = "pcm",
26 + .ctl_reg = CM_PCMCTL,
27 + .div_reg = CM_PCMDIV,
28 + .int_bits = 12,
29 + .frac_bits = 12,
30 + .is_mash_clock = true),
31 [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK(
32 .name = "pwm",
33 .ctl_reg = CM_PWMCTL,
34 --- a/include/dt-bindings/clock/bcm2835.h
35 +++ b/include/dt-bindings/clock/bcm2835.h
36 @@ -44,3 +44,4 @@
37 #define BCM2835_CLOCK_EMMC 28
38 #define BCM2835_CLOCK_PERI_IMAGE 29
39 #define BCM2835_CLOCK_PWM 30
40 +#define BCM2835_CLOCK_PCM 31