target/linux/gemini/patches-3.18/060-cache-fa.diff

   1 --- a/arch/arm/mm/cache-fa.S
   2 +++ b/arch/arm/mm/cache-fa.S
   3 @@ -24,7 +24,8 @@
   4  /*
   5   * The size of one data cache line.
   6   */
   7 -#define CACHE_DLINESIZE        16
   8 +#define CACHE_DLINESIZE                16
   9 +#define CACHE_DLINESHIFT       4
  10
  11  /*
  12   * The total size of the data cache.
  13 @@ -169,7 +170,17 @@ ENTRY(fa_flush_kern_dcache_area)
  14   *     - start  - virtual start address
  15   *     - end    - virtual end address
  16   */
  17 +__flush_whole_dcache:
  18 +       mcr     p15, 0, r0, c7, c14, 0          @ clean/invalidate D cache
  19 +       mov     r0, #0
  20 +       mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer
  21 +       mov     pc, lr
  22 +
  23  fa_dma_inv_range:
  24 +       sub     r3, r1, r0                      @ calculate total size
  25 +       cmp     r3, #CACHE_DLIMIT               @ total size >= limit?
  26 +       bhs     __flush_whole_dcache            @ flush whole D cache
  27 +
  28         tst     r0, #CACHE_DLINESIZE - 1
  29         bic     r0, r0, #CACHE_DLINESIZE - 1
  30         mcrne   p15, 0, r0, c7, c14, 1          @ clean & invalidate D entry
  31 @@ -193,6 +204,10 @@ fa_dma_inv_range:
  32   *     - end    - virtual end address
  33   */
  34  fa_dma_clean_range:
  35 +       sub     r3, r1, r0                      @ calculate total size
  36 +       cmp     r3, #CACHE_DLIMIT               @ total size >= limit?
  37 +       bhs     __flush_whole_dcache            @ flush whole D cache
  38 +
  39         bic     r0, r0, #CACHE_DLINESIZE - 1
  40  1:     mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
  41         add     r0, r0, #CACHE_DLINESIZE