target/linux/generic/pending-4.19/810-pci_disable_common_quirks.patch

   1 From: Gabor Juhos <juhosg@openwrt.org>
   2 Subject: debloat: add kernel config option to disabling common PCI quirks
   3
   4 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
   5 ---
   6  drivers/pci/Kconfig  | 6 ++++++
   7  drivers/pci/quirks.c | 6 ++++++
   8  2 files changed, 12 insertions(+)
   9
  10 --- a/drivers/pci/Kconfig
  11 +++ b/drivers/pci/Kconfig
  12 @@ -71,6 +71,12 @@ config XEN_PCIDEV_FRONTEND
  13            The PCI device frontend driver allows the kernel to import arbitrary
  14            PCI devices from a PCI backend to support PCI driver domains.
  15
  16 +config PCI_DISABLE_COMMON_QUIRKS
  17 +       bool "PCI disable common quirks"
  18 +       depends on PCI
  19 +       help
  20 +         If you don't know what to do here, say N.
  21 +
  22  config HT_IRQ
  23         bool "Interrupts on hypertransport devices"
  24         default y
  25 --- a/drivers/pci/quirks.c
  26 +++ b/drivers/pci/quirks.c
  27 @@ -43,6 +43,7 @@ static void quirk_mmio_always_on(struct
  28  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
  29                                 PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
  30
  31 +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
  32  /* The Mellanox Tavor device gives false positive parity errors
  33   * Mark this device with a broken_parity_status, to allow
  34   * PCI scanning code to "skip" this now blacklisted device.
  35 @@ -3077,6 +3078,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
  36  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
  37  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
  38
  39 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
  40
  41  /*
  42   * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.  To
  43 @@ -3133,6 +3135,8 @@ static void fixup_debug_report(struct pc
  44         }
  45  }
  46
  47 +#ifndef CONFIG_PCI_DISABLE_COMMON_QUIRKS
  48 +
  49  /*
  50   * Some BIOS implementations leave the Intel GPU interrupts enabled,
  51   * even though no one is handling them (f.e. i915 driver is never loaded).
  52 @@ -3171,6 +3175,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
  53  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
  54  DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);
  55
  56 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
  57 +
  58  /*
  59   * PCI devices which are on Intel chips can skip the 10ms delay
  60   * before entering D3 mode.