add a patch to export dma_set_coherent_mask
[openwrt/staging/chunkeey.git] / target / linux / ixp4xx / patches-2.6.33 / 312-ixp4xx_pata_optimization.patch
1 --- a/drivers/ata/pata_ixp4xx_cf.c
2 +++ b/drivers/ata/pata_ixp4xx_cf.c
3 @@ -24,16 +24,58 @@
4 #include <scsi/scsi_host.h>
5
6 #define DRV_NAME "pata_ixp4xx_cf"
7 -#define DRV_VERSION "0.2"
8 +#define DRV_VERSION "0.3"
9
10 static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error)
11 {
12 struct ata_device *dev;
13 + struct ixp4xx_pata_data *data = link->ap->host->dev->platform_data;
14 + unsigned int pio_mask;
15
16 ata_for_each_dev(dev, link, ENABLED) {
17 - ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
18 - dev->pio_mode = XFER_PIO_0;
19 - dev->xfer_mode = XFER_PIO_0;
20 + if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
21 + pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
22 + if (pio_mask & (1 << 1)) {
23 + pio_mask = 4;
24 + } else {
25 + pio_mask = 3;
26 + }
27 + } else {
28 + pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
29 + }
30 +
31 + switch (pio_mask){
32 + case 0:
33 + ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
34 + dev->pio_mode = XFER_PIO_0;
35 + dev->xfer_mode = XFER_PIO_0;
36 + *data->cs0_cfg = 0x8a473c03;
37 + break;
38 + case 1:
39 + ata_dev_printk(dev, KERN_INFO, "configured for PIO1\n");
40 + dev->pio_mode = XFER_PIO_1;
41 + dev->xfer_mode = XFER_PIO_1;
42 + *data->cs0_cfg = 0x86433c03;
43 + break;
44 + case 2:
45 + ata_dev_printk(dev, KERN_INFO, "configured for PIO2\n");
46 + dev->pio_mode = XFER_PIO_2;
47 + dev->xfer_mode = XFER_PIO_2;
48 + *data->cs0_cfg = 0x82413c03;
49 + break;
50 + case 3:
51 + ata_dev_printk(dev, KERN_INFO, "configured for PIO3\n");
52 + dev->pio_mode = XFER_PIO_3;
53 + dev->xfer_mode = XFER_PIO_3;
54 + *data->cs0_cfg = 0x80823c03;
55 + break;
56 + case 4:
57 + ata_dev_printk(dev, KERN_INFO, "configured for PIO4\n");
58 + dev->pio_mode = XFER_PIO_4;
59 + dev->xfer_mode = XFER_PIO_4;
60 + *data->cs0_cfg = 0x80403c03;
61 + break;
62 + }
63 dev->xfer_shift = ATA_SHIFT_PIO;
64 dev->flags |= ATA_DFLAG_PIO;
65 }
66 @@ -46,6 +88,7 @@ static unsigned int ixp4xx_mmio_data_xfe
67 unsigned int i;
68 unsigned int words = buflen >> 1;
69 u16 *buf16 = (u16 *) buf;
70 + unsigned int pio_mask;
71 struct ata_port *ap = dev->link->ap;
72 void __iomem *mmio = ap->ioaddr.data_addr;
73 struct ixp4xx_pata_data *data = ap->host->dev->platform_data;
74 @@ -53,8 +96,34 @@ static unsigned int ixp4xx_mmio_data_xfe
75 /* set the expansion bus in 16bit mode and restore
76 * 8 bit mode after the transaction.
77 */
78 - *data->cs0_cfg &= ~(0x01);
79 - udelay(100);
80 + if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
81 + pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
82 + if (pio_mask & (1 << 1)){
83 + pio_mask = 4;
84 + }else{
85 + pio_mask = 3;
86 + }
87 + }else{
88 + pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
89 + }
90 + switch (pio_mask){
91 + case 0:
92 + *data->cs0_cfg = 0xa9643c42;
93 + break;
94 + case 1:
95 + *data->cs0_cfg = 0x85033c42;
96 + break;
97 + case 2:
98 + *data->cs0_cfg = 0x80b23c42;
99 + break;
100 + case 3:
101 + *data->cs0_cfg = 0x80823c42;
102 + break;
103 + case 4:
104 + *data->cs0_cfg = 0x80403c42;
105 + break;
106 + }
107 + udelay(5);
108
109 /* Transfer multiple of 2 bytes */
110 if (rw == READ)
111 @@ -79,8 +148,24 @@ static unsigned int ixp4xx_mmio_data_xfe
112 words++;
113 }
114
115 - udelay(100);
116 - *data->cs0_cfg |= 0x01;
117 + udelay(5);
118 + switch (pio_mask){
119 + case 0:
120 + *data->cs0_cfg = 0x8a473c03;
121 + break;
122 + case 1:
123 + *data->cs0_cfg = 0x86433c03;
124 + break;
125 + case 2:
126 + *data->cs0_cfg = 0x82413c03;
127 + break;
128 + case 3:
129 + *data->cs0_cfg = 0x80823c03;
130 + break;
131 + case 4:
132 + *data->cs0_cfg = 0x80403c03;
133 + break;
134 + }
135
136 return words << 1;
137 }