4488a6b6de00eeae784d9fecc1fc39f77c13e30a
[openwrt/staging/chunkeey.git] / target / linux / mediatek / patches-4.4 / 0018-dt-bindings-Add-a-binding-for-Mediatek-xHCI-host-con.patch
1 From 84d37aeef94deae3ce87e677f6016a5d980429e8 Mon Sep 17 00:00:00 2001
2 From: "chunfeng.yun@mediatek.com" <chunfeng.yun@mediatek.com>
3 Date: Tue, 17 Nov 2015 17:18:39 +0800
4 Subject: [PATCH 18/81] dt-bindings: Add a binding for Mediatek xHCI host
5 controller
6
7 add a DT binding documentation of xHCI host controller for the
8 MT8173 SoC from Mediatek.
9
10 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
11 ---
12 .../devicetree/bindings/usb/mt8173-xhci.txt | 51 ++++++++++++++++++++
13 1 file changed, 51 insertions(+)
14 create mode 100644 Documentation/devicetree/bindings/usb/mt8173-xhci.txt
15
16 --- /dev/null
17 +++ b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt
18 @@ -0,0 +1,51 @@
19 +MT8173 xHCI
20 +
21 +The device node for Mediatek SOC USB3.0 host controller
22 +
23 +Required properties:
24 + - compatible : should contain "mediatek,mt8173-xhci"
25 + - reg : specifies physical base address and size of the registers,
26 + the first one for MAC, the second for IPPC
27 + - interrupts : interrupt used by the controller
28 + - power-domains : a phandle to USB power domain node to control USB's
29 + mtcmos
30 + - vusb33-supply : regulator of USB avdd3.3v
31 +
32 + - clocks : a list of phandle + clock-specifier pairs, one for each
33 + entry in clock-names
34 + - clock-names : must contain
35 + "sys_ck": for clock of xHCI MAC
36 + "wakeup_deb_p0": for USB wakeup debounce clock of port0
37 + "wakeup_deb_p0": for USB wakeup debounce clock of port1
38 +
39 + - phys : a list of phandle + phy specifier pairs
40 +
41 +Optional properties:
42 + - mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup
43 + mode;
44 + - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup
45 + control register, it depends on "mediatek,wakeup-src".
46 + - vbus-supply : reference to the VBUS regulator;
47 + - usb3-lpm-capable : supports USB3.0 LPM
48 +
49 +Example:
50 +usb30: usb@11270000 {
51 + compatible = "mediatek,mt8173-xhci";
52 + reg = <0 0x11270000 0 0x1000>,
53 + <0 0x11280700 0 0x0100>;
54 + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
55 + power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
56 + clocks = <&topckgen CLK_TOP_USB30_SEL>,
57 + <&pericfg CLK_PERI_USB0>,
58 + <&pericfg CLK_PERI_USB1>;
59 + clock-names = "sys_ck",
60 + "wakeup_deb_p0",
61 + "wakeup_deb_p1";
62 + phys = <&phy_port0 PHY_TYPE_USB3>,
63 + <&phy_port1 PHY_TYPE_USB2>;
64 + vusb33-supply = <&mt6397_vusb_reg>;
65 + vbus-supply = <&usb_p1_vbus>;
66 + usb3-lpm-capable;
67 + mediatek,syscon-wakeup = <&pericfg>;
68 + mediatek,wakeup-src = <1>;
69 +};