mediatek: update patches
[openwrt/staging/chunkeey.git] / target / linux / mediatek / patches-4.4 / 0043-mfd-mt6397-int_con-and-int_status-may-vary-in-locati.patch
1 From 3989b27c0a7cc16d29de14e1cb509b8ee82f7449 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 8 Jan 2016 08:33:17 +0100
4 Subject: [PATCH 43/91] mfd: mt6397: int_con and int_status may vary in
5 location
6
7 MT6323 has the INT_CON and INT_STATUS located at a different position.
8 Make the registers locations configurable.
9
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 ---
12 drivers/mfd/mt6397-core.c | 27 +++++++++++++++++----------
13 include/linux/mfd/mt6397/core.h | 2 ++
14 2 files changed, 19 insertions(+), 10 deletions(-)
15
16 diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
17 index 1749c1c..75ad0fe 100644
18 --- a/drivers/mfd/mt6397-core.c
19 +++ b/drivers/mfd/mt6397-core.c
20 @@ -69,8 +69,10 @@ static void mt6397_irq_sync_unlock(struct irq_data *data)
21 {
22 struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
23
24 - regmap_write(mt6397->regmap, MT6397_INT_CON0, mt6397->irq_masks_cur[0]);
25 - regmap_write(mt6397->regmap, MT6397_INT_CON1, mt6397->irq_masks_cur[1]);
26 + regmap_write(mt6397->regmap, mt6397->int_con[0],
27 + mt6397->irq_masks_cur[0]);
28 + regmap_write(mt6397->regmap, mt6397->int_con[1],
29 + mt6397->irq_masks_cur[1]);
30
31 mutex_unlock(&mt6397->irqlock);
32 }
33 @@ -147,8 +149,8 @@ static irqreturn_t mt6397_irq_thread(int irq, void *data)
34 {
35 struct mt6397_chip *mt6397 = data;
36
37 - mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS0, 0);
38 - mt6397_irq_handle_reg(mt6397, MT6397_INT_STATUS1, 16);
39 + mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
40 + mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
41
42 return IRQ_HANDLED;
43 }
44 @@ -177,8 +179,8 @@ static int mt6397_irq_init(struct mt6397_chip *mt6397)
45 mutex_init(&mt6397->irqlock);
46
47 /* Mask all interrupt sources */
48 - regmap_write(mt6397->regmap, MT6397_INT_CON0, 0x0);
49 - regmap_write(mt6397->regmap, MT6397_INT_CON1, 0x0);
50 + regmap_write(mt6397->regmap, mt6397->int_con[0], 0x0);
51 + regmap_write(mt6397->regmap, mt6397->int_con[1], 0x0);
52
53 mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
54 MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
55 @@ -203,8 +205,8 @@ static int mt6397_irq_suspend(struct device *dev)
56 {
57 struct mt6397_chip *chip = dev_get_drvdata(dev);
58
59 - regmap_write(chip->regmap, MT6397_INT_CON0, chip->wake_mask[0]);
60 - regmap_write(chip->regmap, MT6397_INT_CON1, chip->wake_mask[1]);
61 + regmap_write(chip->regmap, chip->int_con[0], chip->wake_mask[0]);
62 + regmap_write(chip->regmap, chip->int_con[1], chip->wake_mask[1]);
63
64 enable_irq_wake(chip->irq);
65
66 @@ -215,8 +217,8 @@ static int mt6397_irq_resume(struct device *dev)
67 {
68 struct mt6397_chip *chip = dev_get_drvdata(dev);
69
70 - regmap_write(chip->regmap, MT6397_INT_CON0, chip->irq_masks_cur[0]);
71 - regmap_write(chip->regmap, MT6397_INT_CON1, chip->irq_masks_cur[1]);
72 + regmap_write(chip->regmap, chip->int_con[0], chip->irq_masks_cur[0]);
73 + regmap_write(chip->regmap, chip->int_con[1], chip->irq_masks_cur[1]);
74
75 disable_irq_wake(chip->irq);
76
77 @@ -237,6 +239,11 @@ static int mt6397_probe(struct platform_device *pdev)
78 return -ENOMEM;
79
80 mt6397->dev = &pdev->dev;
81 + mt6397->int_con[0] = MT6397_INT_CON0;
82 + mt6397->int_con[1] = MT6397_INT_CON1;
83 + mt6397->int_status[0] = MT6397_INT_STATUS0;
84 + mt6397->int_status[1] = MT6397_INT_STATUS1;
85 +
86 /*
87 * mt6397 MFD is child device of soc pmic wrapper.
88 * Regmap is set from its parent.
89 diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h
90 index 45b8e8a..d678f52 100644
91 --- a/include/linux/mfd/mt6397/core.h
92 +++ b/include/linux/mfd/mt6397/core.h
93 @@ -60,6 +60,8 @@ struct mt6397_chip {
94 u16 wake_mask[2];
95 u16 irq_masks_cur[2];
96 u16 irq_masks_cache[2];
97 + u16 int_con[2];
98 + u16 int_status[2];
99 };
100
101 #endif /* __MFD_MT6397_CORE_H__ */
102 --
103 1.7.10.4
104