88075fefd13dcbe03d883ef977fb9fec4306f342
[openwrt/staging/chunkeey.git] / target / linux / mpc85xx / files / arch / powerpc / boot / dts / tl-wdr4900-v1.dts
1 /*
2 * TP-Link TL-WDR4900 v1 Device Tree Source
3 *
4 * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12 /include/ "fsl/p1010si-pre.dtsi"
13
14 / {
15 model = "TP-Link TL-WDR4900 v1";
16 compatible = "tplink,tl-wdr4900-v1";
17
18 cpus {
19 PowerPC,P1010@0 {
20 bus-frequency = <399999996>;
21 timebase-frequency = <49999999>;
22 clock-frequency = <799999992>;
23 };
24 };
25
26 chosen {
27 bootargs = "console=ttyS0,115200";
28 /*
29 stdout-path = "/soc@ffe00000/serial@4500";
30 */
31 };
32
33 aliases {
34 spi0 = &spi0;
35 led-boot = &system_green;
36 led-failsafe = &system_green;
37 led-running = &system_green;
38 led-upgrade = &system_green;
39 };
40
41 memory {
42 reg = <0x0 0x0 0x0 0x8000000>;
43 device_type = "memory";
44 };
45
46 soc: soc@ffe00000 {
47 ranges = <0x0 0x0 0xffe00000 0x100000>;
48 bus-frequency = <399999996>;
49
50 spi0: spi@7000 {
51 flash@0 {
52 compatible = "jedec,spi-nor";
53 reg = <0>;
54 spi-max-frequency = <25000000>;
55
56 partitions {
57 compatible = "fixed-partitions";
58 #address-cells = <1>;
59 #size-cells = <1>;
60
61 partition@0 {
62 reg = <0x0 0x0050000>;
63 label = "u-boot";
64 read-only;
65 };
66
67 partition@50000 {
68 reg = <0x00050000 0x00010000>;
69 label = "dtb";
70 read-only;
71 };
72
73 partition@60000 {
74 compatible = "tplink,firmware";
75 reg = <0x00060000 0x00f80000>;
76 label = "firmware";
77 };
78
79 config: partition@fe0000 {
80 reg = <0x00fe0000 0x00010000>;
81 label = "config";
82 read-only;
83 };
84
85 partition@ff0000 {
86 reg = <0x00ff0000 0x00010000>;
87 label = "caldata";
88 read-only;
89 };
90 };
91 };
92 };
93
94 gpio0: gpio-controller@fc00 {
95 };
96
97 usb@22000 {
98 phy_type = "utmi";
99 dr_mode = "host";
100 };
101
102 mdio@24000 {
103 phy0: ethernet-phy@0 {
104 reg = <0x0>;
105 qca,ar8327-initvals = <
106 0x00004 0x07600000 /* PAD0_MODE */
107 0x00008 0x00000000 /* PAD5_MODE */
108 0x0000c 0x01000000 /* PAD6_MODE */
109 0x00010 0x40000000 /* POWER_ON_STRIP */
110 0x00050 0xcf35cf35 /* LED_CTRL0 */
111 0x00054 0xcf35cf35 /* LED_CTRL1 */
112 0x00058 0xcf35cf35 /* LED_CTRL2 */
113 0x0005c 0x03ffff00 /* LED_CTRL3 */
114 0x0007c 0x0000007e /* PORT0_STATUS */
115 0x00094 0x00000200 /* PORT6_STATUS */
116 >;
117 };
118 };
119
120 mdio@25000 {
121 status = "disabled";
122 };
123
124 mdio@26000 {
125 status = "disabled";
126 };
127
128 enet0: ethernet@b0000 {
129 phy-handle = <&phy0>;
130 phy-connection-type = "rgmii-id";
131 mtd-mac-address = <&config 0x144>;
132 };
133
134 enet1: ethernet@b1000 {
135 status = "disabled";
136 };
137
138 enet2: ethernet@b2000 {
139 status = "disabled";
140 };
141
142 sdhc@2e000 {
143 status = "disabled";
144 };
145
146 serial1: serial@4600 {
147 status = "disabled";
148 };
149
150 serial@4500 {
151 clock-frequency = <399999996>;
152 };
153
154 can0: can@1c000 {
155 status = "disabled";
156 };
157
158 can1: can@1d000 {
159 status = "disabled";
160 };
161
162 pic@40000 {
163 clock-frequency = <399999996>;
164 };
165
166 ptp_clock@b0e00 {
167 compatible = "fsl,etsec-ptp";
168 reg = <0xb0e00 0xb0>;
169 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
170 fsl,cksel = <1>;
171 fsl,tclk-period = <5>;
172 fsl,tmr-prsc = <2>;
173 fsl,tmr-add = <0xcccccccd>;
174 fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
175 fsl,tmr-fiper2 = <0x00018696>;
176 fsl,max-adj = <249999999>;
177 };
178 };
179
180 pci0: pcie@ffe09000 {
181 reg = <0 0xffe09000 0 0x1000>;
182 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
183 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
184 pcie@0 {
185 ranges = <0x2000000 0x0 0xa0000000
186 0x2000000 0x0 0xa0000000
187 0x0 0x20000000
188
189 0x1000000 0x0 0x0
190 0x1000000 0x0 0x0
191 0x0 0x100000>;
192 };
193 };
194
195 pci1: pcie@ffe0a000 {
196 reg = <0 0xffe0a000 0 0x1000>;
197 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
198 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
199 pcie@0 {
200 ranges = <0x2000000 0x0 0x80000000
201 0x2000000 0x0 0x80000000
202 0x0 0x20000000
203
204 0x1000000 0x0 0x0
205 0x1000000 0x0 0x0
206 0x0 0x100000>;
207 };
208 };
209
210 ifc: ifc@ffe1e000 {
211 status = "disabled";
212 };
213
214 leds {
215 compatible = "gpio-leds";
216
217 system_green: system {
218 gpios = <&gpio0 2 1>; /* active low */
219 label = "tp-link:blue:system";
220 };
221
222 usb1 {
223 gpios = <&gpio0 3 1>; /* active low */
224 label = "tp-link:green:usb1";
225 };
226
227 usb2 {
228 gpios = <&gpio0 4 1>; /* active low */
229 label = "tp-link:green:usb2";
230 };
231
232 usbpower {
233 gpios = <&gpio0 10 1>; /* active low */
234 label = "tp-link:usb:power";
235 };
236 };
237
238 buttons {
239 compatible = "gpio-keys";
240
241 reset {
242 label = "Reset button";
243 gpios = <&gpio0 5 1>; /* active low */
244 linux,code = <0x198>; /* KEY_RESTART */
245 };
246
247 rfkill {
248 label = "RFKILL switch";
249 gpios = <&gpio0 11 1>; /* active low */
250 linux,code = <0xf7>; /* RFKill */
251 };
252 };
253 };
254
255 /include/ "fsl/p1010si-post.dtsi"
256
257 /*
258 * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
259 * related to the P1010.
260 *
261 * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
262 * datasheet states that the P1014 does not include the accelerated crypto
263 * module (CAAM/SEC4) which is present in the P1010.
264 *
265 * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
266 * SEC4 module, but states that SoCs with System Version Register values
267 * 0x80F10110 or 0x80F10120 do not have the security feature.
268 *
269 * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
270 * as: core rev 1.0, "P1014 (without security)".
271 *
272 * The SVR value is reported by uboot on the serial console.
273 */
274
275 / {
276 soc: soc@ffe00000 {
277 /delete-node/ crypto@30000; /* Pulled in by p1010si-post */
278 };
279 };