0d340c8278fdb341e65682da98291297b69207e9
[openwrt/staging/chunkeey.git] / target / linux / mvebu / patches-4.4 / 130-phylink-add-phylink-infrastructure.patch
1 From c6de6de7d3df13822872ac756eebe868d236297a Mon Sep 17 00:00:00 2001
2 From: Russell King <rmk+kernel@arm.linux.org.uk>
3 Date: Tue, 22 Sep 2015 20:52:18 +0100
4 Subject: [PATCH 718/744] phylink: add phylink infrastructure
5
6 The link between the ethernet MAC and its PHY has become more complex
7 as the interface evolves. This is especially true with serdes links,
8 where the part of the PHY is effectively integrated into the MAC.
9
10 Serdes links can be connected to a variety of devices, including SFF
11 modules soldered down onto the board with the MAC, a SFP cage with
12 a hotpluggable SFP module which may contain a PHY or directly modulate
13 the serdes signals onto optical media with or without a PHY, or even
14 a classical PHY connection.
15
16 Moreover, the negotiation information on serdes links comes in two
17 varieties - SGMII mode, where the PHY provides its speed/duplex/flow
18 control information to the MAC, and 1000base-X mode where both ends
19 exchange their abilities and each resolve the link capabilities.
20
21 This means we need a more flexible means to support these arrangements,
22 particularly with the hotpluggable nature of SFP, where the PHY can
23 be attached or detached after the network device has been brought up.
24
25 Ethtool information can come from multiple sources:
26 - we may have a PHY operating in either SGMII or 1000base-X mode, in
27 which case we take ethtool/mii data directly from the PHY.
28 - we may have a optical SFP module without a PHY, with the MAC
29 operating in 1000base-X mode - the ethtool/mii data needs to come
30 from the MAC.
31 - we may have a copper SFP module with a PHY whic can't be accessed,
32 which means we need to take ethtool/mii data from the MAC.
33
34 Phylink aims to solve this by providing an intermediary between the
35 MAC and PHY, providing a safe way for PHYs to be hotplugged, and
36 allowing a SFP driver to reconfigure the serdes connection.
37
38 Phylink also takes over support of fixed link connections, where
39 the speed/duplex/flow control are fixed, but link status may be
40 controlled by a GPIO signal. By avoiding the fixed-phy implementation,
41 phylink can provide a faster response to link events: fixed-phy has
42 to wait for phylib to operate its state machine, which can take
43 several seconds. In comparison, phylink takes milliseconds.
44
45 Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
46 ---
47 drivers/net/phy/Kconfig | 10 +
48 drivers/net/phy/Makefile | 1 +
49 drivers/net/phy/phy_device.c | 1 +
50 drivers/net/phy/phylink.c | 816 +++++++++++++++++++++++++++++++++++++++++++
51 include/linux/phy.h | 2 +
52 include/linux/phylink.h | 70 ++++
53 6 files changed, 900 insertions(+)
54 create mode 100644 drivers/net/phy/phylink.c
55 create mode 100644 include/linux/phylink.h
56
57 --- a/drivers/net/phy/Kconfig
58 +++ b/drivers/net/phy/Kconfig
59 @@ -10,6 +10,16 @@ menuconfig PHYLIB
60 devices. This option provides infrastructure for
61 managing PHY devices.
62
63 +config PHYLINK
64 + tristate
65 + depends on NETDEVICES
66 + select PHYLIB
67 + select SWPHY
68 + help
69 + PHYlink models the link between the PHY and MAC, allowing fixed
70 + configuration links, PHYs, and Serdes links with MAC level
71 + autonegotiation modes.
72 +
73 if PHYLIB
74
75 config MDIO_BOARDINFO
76 --- a/drivers/net/phy/Makefile
77 +++ b/drivers/net/phy/Makefile
78 @@ -5,6 +5,7 @@ libphy-$(CONFIG_SWPHY) += swphy.o
79
80 obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o
81
82 +obj-$(CONFIG_PHYLINK) += phylink.o
83 obj-$(CONFIG_PHYLIB) += libphy.o
84 obj-$(CONFIG_SWCONFIG) += swconfig.o
85 obj-$(CONFIG_AQUANTIA_PHY) += aquantia.o
86 --- a/drivers/net/phy/phy_device.c
87 +++ b/drivers/net/phy/phy_device.c
88 @@ -754,6 +754,7 @@ void phy_detach(struct phy_device *phyde
89 phydev->attached_dev->phydev = NULL;
90 phydev->attached_dev = NULL;
91 phy_suspend(phydev);
92 + phydev->phylink = NULL;
93
94 /* If the device had no specific driver before (i.e. - it
95 * was using the generic driver), we unbind the device
96 --- /dev/null
97 +++ b/drivers/net/phy/phylink.c
98 @@ -0,0 +1,816 @@
99 +/*
100 + * phylink models the MAC to optional PHY connection, supporting
101 + * technologies such as SFP cages where the PHY is hot-pluggable.
102 + *
103 + * Copyright (C) 2015 Russell King
104 + *
105 + * This program is free software; you can redistribute it and/or modify
106 + * it under the terms of the GNU General Public License version 2 as
107 + * published by the Free Software Foundation.
108 + */
109 +#include <linux/ethtool.h>
110 +#include <linux/export.h>
111 +#include <linux/gpio/consumer.h>
112 +#include <linux/netdevice.h>
113 +#include <linux/of.h>
114 +#include <linux/of_mdio.h>
115 +#include <linux/phy.h>
116 +#include <linux/phy_fixed.h>
117 +#include <linux/phylink.h>
118 +#include <linux/spinlock.h>
119 +#include <linux/workqueue.h>
120 +
121 +#include "swphy.h"
122 +
123 +#define SUPPORTED_INTERFACES \
124 + (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
125 + SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
126 +#define ADVERTISED_INTERFACES \
127 + (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
128 + ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
129 +
130 +enum {
131 + PHYLINK_DISABLE_STOPPED,
132 +};
133 +
134 +struct phylink {
135 + struct net_device *netdev;
136 + const struct phylink_mac_ops *ops;
137 + struct mutex config_mutex;
138 +
139 + unsigned long phylink_disable_state; /* bitmask of disables */
140 + struct phy_device *phydev;
141 + phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
142 + u8 link_an_mode; /* MLO_AN_xxx */
143 + u8 link_port; /* The current non-phy ethtool port */
144 + u32 link_port_support; /* SUPPORTED_xxx ethtool for ports */
145 +
146 + /* The link configuration settings */
147 + struct phylink_link_state link_config;
148 + struct gpio_desc *link_gpio;
149 +
150 + struct mutex state_mutex; /* may be taken within config_mutex */
151 + struct phylink_link_state phy_state;
152 + struct work_struct resolve;
153 +
154 + bool mac_link_up;
155 +};
156 +
157 +static const char *phylink_an_mode_str(unsigned int mode)
158 +{
159 + static const char *modestr[] = {
160 + [MLO_AN_PHY] = "phy",
161 + [MLO_AN_FIXED] = "fixed",
162 + [MLO_AN_SGMII] = "SGMII",
163 + [MLO_AN_8023Z] = "802.3z",
164 + };
165 +
166 + return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
167 +}
168 +
169 +static int phylink_parse_fixedlink(struct phylink *pl, struct device_node *np)
170 +{
171 + struct device_node *fixed_node;
172 + int ret, len;
173 +
174 + fixed_node = of_get_child_by_name(np, "fixed-link");
175 + if (fixed_node) {
176 + struct gpio_desc *desc;
177 + u32 speed;
178 +
179 + ret = of_property_read_u32(fixed_node, "speed", &speed);
180 +
181 + pl->link_an_mode = MLO_AN_FIXED;
182 + pl->link_config.link = 1;
183 + pl->link_config.an_complete = 1;
184 + pl->link_config.speed = speed;
185 + pl->link_config.duplex = DUPLEX_HALF;
186 + pl->link_config.pause = MLO_PAUSE_NONE;
187 +
188 + if (of_property_read_bool(fixed_node, "full-duplex"))
189 + pl->link_config.duplex = DUPLEX_FULL;
190 + if (of_property_read_bool(fixed_node, "pause"))
191 + pl->link_config.pause |= MLO_PAUSE_SYM;
192 + if (of_property_read_bool(fixed_node, "asym-pause"))
193 + pl->link_config.pause |= MLO_PAUSE_ASYM;
194 +
195 + if (ret == 0) {
196 + desc = fwnode_get_named_gpiod(&fixed_node->fwnode,
197 + "link-gpios");
198 +
199 + if (!IS_ERR(desc))
200 + pl->link_gpio = desc;
201 + else if (desc == ERR_PTR(-EPROBE_DEFER))
202 + ret = -EPROBE_DEFER;
203 + }
204 + of_node_put(fixed_node);
205 + } else {
206 + const __be32 *fixed_prop;
207 +
208 + fixed_prop = of_get_property(np, "fixed-link", &len);
209 + if (fixed_prop && len == 5 * sizeof(*fixed_prop)) {
210 + pl->link_config.duplex = be32_to_cpu(fixed_prop[1]) ?
211 + DUPLEX_FULL : DUPLEX_HALF;
212 + pl->link_config.speed = be32_to_cpu(fixed_prop[2]);
213 + pl->link_config.pause = MLO_PAUSE_NONE;
214 + if (be32_to_cpu(fixed_prop[3]))
215 + pl->link_config.pause |= MLO_PAUSE_SYM;
216 + if (be32_to_cpu(fixed_prop[4]))
217 + pl->link_config.pause |= MLO_PAUSE_ASYM;
218 +
219 + pl->link_an_mode = MLO_AN_FIXED;
220 + }
221 + ret = 0;
222 + }
223 +
224 + if (pl->link_an_mode == MLO_AN_FIXED) {
225 + /* Generate the supported/advertising masks */
226 + if (pl->link_config.pause & MLO_PAUSE_SYM) {
227 + pl->link_config.supported |= SUPPORTED_Pause;
228 + pl->link_config.advertising |= ADVERTISED_Pause;
229 + }
230 + if (pl->link_config.pause & MLO_PAUSE_ASYM) {
231 + pl->link_config.supported |= SUPPORTED_Asym_Pause;
232 + pl->link_config.advertising |= ADVERTISED_Asym_Pause;
233 + }
234 +
235 + if (pl->link_config.speed > SPEED_1000 &&
236 + pl->link_config.duplex != DUPLEX_FULL)
237 + netdev_warn(pl->netdev, "fixed link specifies half duplex for %dMbps link?\n",
238 + pl->link_config.speed);
239 +
240 +#define S(spd) \
241 + pl->link_config.supported |= pl->link_config.duplex ? \
242 + SUPPORTED_##spd##_Full : SUPPORTED_##spd##_Half
243 +#define A(spd) \
244 + pl->link_config.advertising |= pl->link_config.duplex ? \
245 + ADVERTISED_##spd##_Full : ADVERTISED_##spd##_Half
246 +#define C(spd, tech) \
247 + case spd: \
248 + S(spd##tech); \
249 + A(spd##tech); \
250 + break
251 + switch (pl->link_config.speed) {
252 + C(10, baseT);
253 + C(100, baseT);
254 + C(1000, baseT);
255 +#undef S
256 +#undef A
257 +#define S(spd) pl->link_config.supported |= SUPPORTED_##spd##_Full
258 +#define A(spd) pl->link_config.advertising |= ADVERTISED_##spd##_Full
259 + C(2500, baseX);
260 + C(10000, baseT);
261 + }
262 +#undef S
263 +#undef A
264 +#undef C
265 + }
266 + return ret;
267 +}
268 +
269 +static int phylink_parse_managed(struct phylink *pl, struct device_node *np)
270 +{
271 + const char *managed;
272 +
273 + if (of_property_read_string(np, "managed", &managed) == 0 &&
274 + strcmp(managed, "in-band-status") == 0) {
275 + if (pl->link_an_mode == MLO_AN_FIXED) {
276 + netdev_err(pl->netdev,
277 + "can't use both fixed-link and in-band-status\n");
278 + return -EINVAL;
279 + }
280 + pl->link_an_mode = MLO_AN_SGMII;
281 + pl->link_config.an_enabled = true;
282 + }
283 +
284 + return 0;
285 +}
286 +
287 +
288 +static int phylink_get_support(struct phylink *pl, unsigned int mode)
289 +{
290 + struct phylink_link_state state = pl->link_config;
291 + int ret;
292 +
293 + ret = pl->ops->mac_get_support(pl->netdev, mode, &state);
294 + if (ret == 0) {
295 + pl->link_an_mode = mode;
296 + pl->link_config = state;
297 + }
298 +
299 + return ret;
300 +}
301 +
302 +static void phylink_mac_config(struct phylink *pl,
303 + const struct phylink_link_state *state)
304 +{
305 + pl->ops->mac_config(pl->netdev, pl->link_an_mode, state);
306 +}
307 +
308 +static void phylink_mac_an_restart(struct phylink *pl)
309 +{
310 + if (pl->link_config.an_enabled)
311 + pl->ops->mac_an_restart(pl->netdev, pl->link_an_mode);
312 +}
313 +
314 +static int phylink_get_mac_state(struct phylink *pl, struct phylink_link_state *state)
315 +{
316 + struct net_device *ndev = pl->netdev;
317 +
318 + state->supported = pl->link_config.supported;
319 + state->advertising = pl->link_config.advertising;
320 + state->an_enabled = pl->link_config.an_enabled;
321 + state->link = 1;
322 + state->sync = 1;
323 +
324 + return pl->ops->mac_link_state(ndev, state);
325 +}
326 +
327 +/* The fixed state is... fixed except for the link state,
328 + * which may be determined by a GPIO.
329 + */
330 +static void phylink_get_fixed_state(struct phylink *pl, struct phylink_link_state *state)
331 +{
332 + *state = pl->link_config;
333 + if (pl->link_gpio)
334 + state->link = !!gpiod_get_value(pl->link_gpio);
335 +}
336 +
337 +extern const char *phy_speed_to_str(int speed);
338 +
339 +static void phylink_resolve(struct work_struct *w)
340 +{
341 + struct phylink *pl = container_of(w, struct phylink, resolve);
342 + struct phylink_link_state link_state;
343 + struct net_device *ndev = pl->netdev;
344 +
345 + mutex_lock(&pl->state_mutex);
346 + if (pl->phylink_disable_state) {
347 + link_state.link = false;
348 + } else {
349 + switch (pl->link_an_mode) {
350 + case MLO_AN_PHY:
351 + link_state = pl->phy_state;
352 + break;
353 +
354 + case MLO_AN_FIXED:
355 + phylink_get_fixed_state(pl, &link_state);
356 + break;
357 +
358 + case MLO_AN_SGMII:
359 + phylink_get_mac_state(pl, &link_state);
360 + if (pl->phydev)
361 + link_state.link = link_state.link &&
362 + pl->phy_state.link;
363 + break;
364 +
365 + case MLO_AN_8023Z:
366 + phylink_get_mac_state(pl, &link_state);
367 + break;
368 + }
369 + }
370 +
371 + if (link_state.link != netif_carrier_ok(ndev)) {
372 + if (!link_state.link) {
373 + netif_carrier_off(ndev);
374 + pl->ops->mac_link_down(ndev, pl->link_an_mode);
375 + netdev_info(ndev, "Link is Down\n");
376 + } else {
377 + /* If we have a PHY, we need the MAC updated with
378 + * the current link parameters (eg, in SGMII mode,
379 + * with flow control status.)
380 + */
381 + if (pl->phydev)
382 + phylink_mac_config(pl, &link_state);
383 +
384 + pl->ops->mac_link_up(ndev, pl->link_an_mode);
385 +
386 + netif_carrier_on(ndev);
387 +
388 + netdev_info(ndev,
389 + "Link is Up - %s/%s - flow control %s\n",
390 + phy_speed_to_str(link_state.speed),
391 + link_state.duplex ? "Full" : "Half",
392 + link_state.pause ? "rx/tx" : "off");
393 + }
394 + }
395 + mutex_unlock(&pl->state_mutex);
396 +}
397 +
398 +static void phylink_run_resolve(struct phylink *pl)
399 +{
400 + if (!pl->phylink_disable_state)
401 + queue_work(system_power_efficient_wq, &pl->resolve);
402 +}
403 +
404 +struct phylink *phylink_create(struct net_device *ndev, struct device_node *np,
405 + phy_interface_t iface, const struct phylink_mac_ops *ops)
406 +{
407 + struct phylink *pl;
408 + int ret;
409 +
410 + pl = kzalloc(sizeof(*pl), GFP_KERNEL);
411 + if (!pl)
412 + return ERR_PTR(-ENOMEM);
413 +
414 + mutex_init(&pl->state_mutex);
415 + mutex_init(&pl->config_mutex);
416 + INIT_WORK(&pl->resolve, phylink_resolve);
417 + pl->netdev = ndev;
418 + pl->link_interface = iface;
419 + pl->link_port_support = SUPPORTED_MII;
420 + pl->link_port = PORT_MII;
421 + pl->ops = ops;
422 + __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
423 +
424 + ret = phylink_parse_fixedlink(pl, np);
425 + if (ret < 0) {
426 + kfree(pl);
427 + return ERR_PTR(ret);
428 + }
429 +
430 + ret = phylink_parse_managed(pl, np);
431 + if (ret < 0) {
432 + kfree(pl);
433 + return ERR_PTR(ret);
434 + }
435 +
436 + ret = phylink_get_support(pl, pl->link_an_mode);
437 + if (ret) {
438 + kfree(pl);
439 + return ERR_PTR(ret);
440 + }
441 +
442 + return pl;
443 +}
444 +EXPORT_SYMBOL_GPL(phylink_create);
445 +
446 +void phylink_destroy(struct phylink *pl)
447 +{
448 + cancel_work_sync(&pl->resolve);
449 + kfree(pl);
450 +}
451 +EXPORT_SYMBOL_GPL(phylink_destroy);
452 +
453 +void phylink_phy_change(struct phy_device *phy, bool up, bool do_carrier)
454 +{
455 + struct phylink *pl = phy->phylink;
456 +
457 + mutex_lock(&pl->state_mutex);
458 + pl->phy_state.speed = phy->speed;
459 + pl->phy_state.duplex = phy->duplex;
460 + pl->phy_state.pause = MLO_PAUSE_NONE;
461 + if (phy->pause)
462 + pl->phy_state.pause |= MLO_PAUSE_SYM;
463 + if (phy->asym_pause)
464 + pl->phy_state.pause |= MLO_PAUSE_ASYM;
465 + pl->phy_state.link = up;
466 + mutex_unlock(&pl->state_mutex);
467 +
468 + phylink_run_resolve(pl);
469 +
470 + netdev_dbg(pl->netdev, "phy link %s\n", up ? "up" : "down");
471 +}
472 +
473 +static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy)
474 +{
475 + mutex_lock(&pl->config_mutex);
476 + phy->phylink = pl;
477 + phy->phy_link_change = phylink_phy_change;
478 +
479 + netdev_info(pl->netdev,
480 + "PHY [%s] driver [%s]\n", dev_name(&phy->dev),
481 + phy->drv->name);
482 +
483 + mutex_lock(&pl->state_mutex);
484 + pl->phydev = phy;
485 +
486 + /* Restrict the phy advertisment to the union of the PHY and
487 + * MAC-level advert.
488 + */
489 + phy->advertising &= ADVERTISED_INTERFACES |
490 + pl->link_config.advertising;
491 + mutex_unlock(&pl->state_mutex);
492 +
493 + phy_start_machine(phy);
494 + if (phy->irq > 0)
495 + phy_start_interrupts(phy);
496 +
497 + mutex_unlock(&pl->config_mutex);
498 +
499 + return 0;
500 +}
501 +
502 +int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
503 +{
504 + int ret;
505 +
506 + ret = phy_attach_direct(pl->netdev, phy, 0, pl->link_interface);
507 + if (ret)
508 + return ret;
509 +
510 + ret = phylink_bringup_phy(pl, phy);
511 + if (ret)
512 + phy_detach(phy);
513 +
514 + return ret;
515 +}
516 +EXPORT_SYMBOL_GPL(phylink_connect_phy);
517 +
518 +int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn)
519 +{
520 + struct device_node *phy_node;
521 + struct phy_device *phy_dev;
522 + int ret;
523 +
524 + /* Fixed links are handled without needing a PHY */
525 + if (pl->link_an_mode == MLO_AN_FIXED)
526 + return 0;
527 +
528 + phy_node = of_parse_phandle(dn, "phy-handle", 0);
529 + if (!phy_node)
530 + phy_node = of_parse_phandle(dn, "phy", 0);
531 + if (!phy_node)
532 + phy_node = of_parse_phandle(dn, "phy-device", 0);
533 +
534 + if (!phy_node) {
535 + if (pl->link_an_mode == MLO_AN_PHY) {
536 + netdev_err(pl->netdev, "unable to find PHY node\n");
537 + return -ENODEV;
538 + }
539 + return 0;
540 + }
541 +
542 + phy_dev = of_phy_attach(pl->netdev, phy_node, 0, pl->link_interface);
543 + /* We're done with the phy_node handle */
544 + of_node_put(phy_node);
545 +
546 + if (!phy_dev)
547 + return -ENODEV;
548 +
549 + ret = phylink_bringup_phy(pl, phy_dev);
550 + if (ret)
551 + phy_detach(phy_dev);
552 +
553 + return ret;
554 +}
555 +EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
556 +
557 +void phylink_disconnect_phy(struct phylink *pl)
558 +{
559 + struct phy_device *phy;
560 +
561 + mutex_lock(&pl->config_mutex);
562 + phy = pl->phydev;
563 +
564 + mutex_lock(&pl->state_mutex);
565 + pl->phydev = NULL;
566 + mutex_unlock(&pl->state_mutex);
567 + flush_work(&pl->resolve);
568 +
569 + if (phy)
570 + phy_disconnect(phy);
571 +
572 + mutex_unlock(&pl->config_mutex);
573 +}
574 +EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
575 +
576 +void phylink_mac_change(struct phylink *pl, bool up)
577 +{
578 + phylink_run_resolve(pl);
579 + netdev_dbg(pl->netdev, "mac link %s\n", up ? "up" : "down");
580 +}
581 +EXPORT_SYMBOL_GPL(phylink_mac_change);
582 +
583 +void phylink_start(struct phylink *pl)
584 +{
585 + mutex_lock(&pl->config_mutex);
586 +
587 + netdev_info(pl->netdev, "configuring for %s link mode\n",
588 + phylink_an_mode_str(pl->link_an_mode));
589 +
590 + /* Apply the link configuration to the MAC when starting. This allows
591 + * a fixed-link to start with the correct parameters, and also
592 + * ensures that we set the appropriate advertisment for Serdes links.
593 + */
594 + phylink_mac_config(pl, &pl->link_config);
595 +
596 + clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
597 + phylink_run_resolve(pl);
598 +
599 + if (pl->phydev)
600 + phy_start(pl->phydev);
601 +
602 + mutex_unlock(&pl->config_mutex);
603 +}
604 +EXPORT_SYMBOL_GPL(phylink_start);
605 +
606 +void phylink_stop(struct phylink *pl)
607 +{
608 + mutex_lock(&pl->config_mutex);
609 +
610 + if (pl->phydev)
611 + phy_stop(pl->phydev);
612 +
613 + set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
614 + flush_work(&pl->resolve);
615 +
616 + pl->mac_link_up = false;
617 +
618 + mutex_unlock(&pl->config_mutex);
619 +}
620 +EXPORT_SYMBOL_GPL(phylink_stop);
621 +
622 +static void phylink_get_ethtool(const struct phylink_link_state *state,
623 + struct ethtool_cmd *cmd)
624 +{
625 + cmd->supported &= SUPPORTED_INTERFACES;
626 + cmd->supported |= state->supported;
627 + cmd->advertising &= ADVERTISED_INTERFACES;
628 + cmd->advertising |= state->advertising;
629 + ethtool_cmd_speed_set(cmd, state->speed);
630 + cmd->duplex = state->duplex;
631 +
632 + cmd->autoneg = state->an_enabled ? AUTONEG_ENABLE : AUTONEG_DISABLE;
633 +}
634 +
635 +static int phylink_ethtool_gset(struct phylink *pl, struct ethtool_cmd *cmd)
636 +{
637 + struct phylink_link_state link_state;
638 + int ret;
639 +
640 + if (pl->phydev) {
641 + ret = phy_ethtool_gset(pl->phydev, cmd);
642 + if (ret)
643 + return ret;
644 +
645 + cmd->supported &= SUPPORTED_INTERFACES |
646 + pl->link_config.supported;
647 + } else {
648 + cmd->supported = pl->link_port_support;
649 + cmd->transceiver = XCVR_EXTERNAL;
650 + cmd->port = pl->link_port;
651 + }
652 +
653 + switch (pl->link_an_mode) {
654 + case MLO_AN_FIXED:
655 + /* We are using fixed settings. Report these as the
656 + * current link settings - and note that these also
657 + * represent the supported speeds/duplex/pause modes.
658 + */
659 + phylink_get_fixed_state(pl, &link_state);
660 + phylink_get_ethtool(&link_state, cmd);
661 + break;
662 +
663 + case MLO_AN_SGMII:
664 + /* If there is a phy attached, then use the reported
665 + * settings from the phy with no modification.
666 + */
667 + if (pl->phydev)
668 + break;
669 +
670 + case MLO_AN_8023Z:
671 + phylink_get_mac_state(pl, &link_state);
672 +
673 + /* The MAC is reporting the link results from its own PCS
674 + * layer via in-band status. Report these as the current
675 + * link settings.
676 + */
677 + phylink_get_ethtool(&link_state, cmd);
678 + break;
679 + }
680 +
681 + return 0;
682 +}
683 +
684 +int phylink_ethtool_get_settings(struct phylink *pl, struct ethtool_cmd *cmd)
685 +{
686 + int ret;
687 +
688 + mutex_lock(&pl->config_mutex);
689 + ret = phylink_ethtool_gset(pl, cmd);
690 + mutex_unlock(&pl->config_mutex);
691 +
692 + return ret;
693 +}
694 +EXPORT_SYMBOL_GPL(phylink_ethtool_get_settings);
695 +
696 +static int phylink_ethtool_sset(struct phylink *pl, struct ethtool_cmd *cmd)
697 +{
698 + u32 supported;
699 + int ret;
700 +
701 + /* Calculate the union of the MAC support and attached phy support */
702 + supported = pl->link_config.supported;
703 + if (pl->phydev)
704 + supported &= pl->phydev->supported;
705 +
706 + /* Mask out unsupported advertisments */
707 + cmd->advertising &= supported;
708 +
709 + /* FIXME: should we reject autoneg if phy/mac does not support it? */
710 +
711 + if (cmd->autoneg == AUTONEG_DISABLE) {
712 + /* Autonegotiation disabled, validate speed and duplex */
713 + if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL)
714 + return -EINVAL;
715 +
716 + /* FIXME: validate speed/duplex against supported */
717 +
718 + cmd->advertising &= ~ADVERTISED_Autoneg;
719 + } else {
720 + /* Autonegotiation enabled, validate advertisment */
721 + /* FIXME: shouldn't we ensure there's some duplex/speeds set */
722 + if (cmd->advertising == 0)
723 + return -EINVAL;
724 +
725 + cmd->advertising |= ADVERTISED_Autoneg;
726 + }
727 +
728 + /* If we have a fixed link (as specified by firmware), refuse
729 + * to enable autonegotiation, or change link parameters.
730 + */
731 + if (pl->link_an_mode == MLO_AN_FIXED) {
732 + if (cmd->autoneg != AUTONEG_DISABLE ||
733 + ethtool_cmd_speed(cmd) != pl->link_config.speed ||
734 + cmd->duplex != pl->link_config.duplex)
735 + return -EINVAL;
736 + }
737 +
738 + /* If we have a PHY, configure the phy */
739 + if (pl->phydev) {
740 + ret = phy_ethtool_sset(pl->phydev, cmd);
741 + if (ret)
742 + return ret;
743 + }
744 +
745 + mutex_lock(&pl->state_mutex);
746 + /* Configure the MAC to match the new settings */
747 + pl->link_config.advertising = cmd->advertising;
748 + pl->link_config.speed = cmd->speed;
749 + pl->link_config.duplex = cmd->duplex;
750 + pl->link_config.an_enabled = cmd->autoneg != AUTONEG_DISABLE;
751 +
752 + phylink_mac_config(pl, &pl->link_config);
753 + phylink_mac_an_restart(pl);
754 + mutex_unlock(&pl->state_mutex);
755 +
756 + return ret;
757 +}
758 +
759 +int phylink_ethtool_set_settings(struct phylink *pl, struct ethtool_cmd *cmd)
760 +{
761 + int ret;
762 +
763 + if (cmd->autoneg != AUTONEG_DISABLE && cmd->autoneg != AUTONEG_ENABLE)
764 + return -EINVAL;
765 +
766 + mutex_lock(&pl->config_mutex);
767 + ret = phylink_ethtool_sset(pl, cmd);
768 + mutex_unlock(&pl->config_mutex);
769 +
770 + return ret;
771 +}
772 +EXPORT_SYMBOL_GPL(phylink_ethtool_set_settings);
773 +
774 +/* This emulates MII registers for a fixed-mode phy operating as per the
775 + * passed in state. "aneg" defines if we report negotiation is possible.
776 + *
777 + * FIXME: should deal with negotiation state too.
778 + */
779 +static int phylink_mii_emul_read(struct net_device *ndev, unsigned int reg,
780 + struct phylink_link_state *state, bool aneg)
781 +{
782 + struct fixed_phy_status fs;
783 + int val;
784 +
785 + fs.link = state->link;
786 + fs.speed = state->speed;
787 + fs.duplex = state->duplex;
788 + fs.pause = state->pause & MLO_PAUSE_SYM;
789 + fs.asym_pause = state->pause & MLO_PAUSE_ASYM;
790 +
791 + val = swphy_read_reg(reg, &fs);
792 + if (reg == MII_BMSR) {
793 + if (!state->an_complete)
794 + val &= ~BMSR_ANEGCOMPLETE;
795 + if (!aneg)
796 + val &= ~BMSR_ANEGCAPABLE;
797 + }
798 + return val;
799 +}
800 +
801 +static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
802 + unsigned int reg)
803 +{
804 + struct phylink_link_state state;
805 + int val = 0xffff;
806 +
807 + if (pl->phydev && pl->phydev->addr != phy_id)
808 + return mdiobus_read(pl->phydev->bus, phy_id, reg);
809 +
810 + if (!pl->phydev && phy_id != 0)
811 + return val;
812 +
813 + switch (pl->link_an_mode) {
814 + case MLO_AN_FIXED:
815 + phylink_get_fixed_state(pl, &state);
816 + val = phylink_mii_emul_read(pl->netdev, reg, &state, true);
817 + break;
818 +
819 + case MLO_AN_PHY:
820 + val = mdiobus_read(pl->phydev->bus, phy_id, reg);
821 + break;
822 +
823 + case MLO_AN_SGMII:
824 + if (pl->phydev) {
825 + val = mdiobus_read(pl->phydev->bus,
826 + pl->phydev->addr, reg);
827 + break;
828 + }
829 + /* No phy, fall through to reading the MAC end */
830 + case MLO_AN_8023Z:
831 + val = phylink_get_mac_state(pl, &state);
832 + if (val < 0)
833 + return val;
834 +
835 + val = phylink_mii_emul_read(pl->netdev, reg, &state, true);
836 + break;
837 + }
838 +
839 + return val & 0xffff;
840 +}
841 +
842 +static void phylink_mii_write(struct phylink *pl, unsigned int phy_id,
843 + unsigned int reg, unsigned int val)
844 +{
845 + if (pl->phydev && pl->phydev->addr != phy_id) {
846 + mdiobus_write(pl->phydev->bus, phy_id, reg, val);
847 + return;
848 + }
849 +
850 + if (!pl->phydev && phy_id != 0)
851 + return;
852 +
853 + switch (pl->link_an_mode) {
854 + case MLO_AN_FIXED:
855 + break;
856 +
857 + case MLO_AN_PHY:
858 + mdiobus_write(pl->phydev->bus, pl->phydev->addr,
859 + reg, val);
860 + break;
861 +
862 + case MLO_AN_SGMII:
863 + if (pl->phydev) {
864 + mdiobus_write(pl->phydev->bus, phy_id, reg, val);
865 + break;
866 + }
867 + /* No phy, fall through to reading the MAC end */
868 + case MLO_AN_8023Z:
869 + break;
870 + }
871 +}
872 +
873 +int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
874 +{
875 + struct mii_ioctl_data *mii_data = if_mii(ifr);
876 + int val, ret;
877 +
878 + mutex_lock(&pl->config_mutex);
879 +
880 + switch (cmd) {
881 + case SIOCGMIIPHY:
882 + mii_data->phy_id = pl->phydev ? pl->phydev->addr : 0;
883 + /* fallthrough */
884 +
885 + case SIOCGMIIREG:
886 + val = phylink_mii_read(pl, mii_data->phy_id, mii_data->reg_num);
887 + if (val < 0) {
888 + ret = val;
889 + } else {
890 + mii_data->val_out = val;
891 + ret = 0;
892 + }
893 + break;
894 +
895 + case SIOCSMIIREG:
896 + phylink_mii_write(pl, mii_data->phy_id, mii_data->reg_num,
897 + mii_data->val_in);
898 + ret = 0;
899 + break;
900 +
901 + default:
902 + ret = -EOPNOTSUPP;
903 + if (pl->phydev)
904 + ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
905 + break;
906 + }
907 +
908 + mutex_unlock(&pl->config_mutex);
909 +
910 + return ret;
911 +}
912 +EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
913 +
914 +MODULE_LICENSE("GPL");
915 --- a/include/linux/phy.h
916 +++ b/include/linux/phy.h
917 @@ -147,6 +147,7 @@ static inline const char *phy_modes(phy_
918 #define MII_ADDR_C45 (1<<30)
919
920 struct device;
921 +struct phylink;
922 struct sk_buff;
923
924 /*
925 @@ -429,6 +430,7 @@ struct phy_device {
926
927 struct mutex lock;
928
929 + struct phylink *phylink;
930 struct net_device *attached_dev;
931
932 u8 mdix;
933 --- /dev/null
934 +++ b/include/linux/phylink.h
935 @@ -0,0 +1,70 @@
936 +#ifndef NETDEV_PCS_H
937 +#define NETDEV_PCS_H
938 +
939 +#include <linux/phy.h>
940 +#include <linux/spinlock.h>
941 +#include <linux/workqueue.h>
942 +
943 +struct device_node;
944 +struct ethtool_cmd;
945 +struct net_device;
946 +
947 +enum {
948 + MLO_PAUSE_NONE,
949 + MLO_PAUSE_ASYM = BIT(0),
950 + MLO_PAUSE_SYM = BIT(1),
951 +
952 + MLO_AN_PHY = 0,
953 + MLO_AN_FIXED,
954 + MLO_AN_SGMII,
955 + MLO_AN_8023Z,
956 +};
957 +
958 +struct phylink_link_state {
959 + u32 supported;
960 + u32 advertising;
961 + u32 lp_advertising;
962 + int speed;
963 + int duplex;
964 + int pause;
965 + unsigned int link:1;
966 + unsigned int sync:1;
967 + unsigned int an_enabled:1;
968 + unsigned int an_complete:1;
969 +};
970 +
971 +struct phylink_mac_ops {
972 + /* Get the ethtool supported mask for the indicated mode */
973 + int (*mac_get_support)(struct net_device *, unsigned int mode,
974 + struct phylink_link_state *);
975 +
976 + /* Read the current link state from the hardware */
977 + int (*mac_link_state)(struct net_device *, struct phylink_link_state *);
978 +
979 + /* Configure the MAC */
980 + void (*mac_config)(struct net_device *, unsigned int mode,
981 + const struct phylink_link_state *);
982 + void (*mac_an_restart)(struct net_device *, unsigned int mode);
983 +
984 + void (*mac_link_down)(struct net_device *, unsigned int mode);
985 + void (*mac_link_up)(struct net_device *, unsigned int mode);
986 +};
987 +
988 +struct phylink *phylink_create(struct net_device *, struct device_node *,
989 + phy_interface_t iface, const struct phylink_mac_ops *ops);
990 +void phylink_destroy(struct phylink *);
991 +
992 +int phylink_connect_phy(struct phylink *, struct phy_device *);
993 +int phylink_of_phy_connect(struct phylink *, struct device_node *);
994 +void phylink_disconnect_phy(struct phylink *);
995 +
996 +void phylink_mac_change(struct phylink *, bool up);
997 +
998 +void phylink_start(struct phylink *);
999 +void phylink_stop(struct phylink *);
1000 +
1001 +int phylink_ethtool_get_settings(struct phylink *, struct ethtool_cmd *);
1002 +int phylink_ethtool_set_settings(struct phylink *, struct ethtool_cmd *);
1003 +int phylink_mii_ioctl(struct phylink *, struct ifreq *, int);
1004 +
1005 +#endif