bdd828fe8fde7c1f0547ef02e6a3b8f2f2ff7164
[openwrt/staging/chunkeey.git] / target / linux / ramips / dts / CS-QR10.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "ralink,mt7620a-soc";
9 model = "Planex CS-QR10";
10
11 sound {
12 compatible = "mediatek,mt7620-audio-wm8960";
13 model = "mt7620-wm8960";
14 i2s-controller = <&i2s>;
15 audio-routing =
16 "Ext Spk", "SPK_LP",
17 "Ext Spk", "SPK_LN",
18 "Ext Spk", "SPK_RP",
19 "Ext Spk", "SPK_RN";
20 };
21
22 gpio-leds {
23 compatible = "gpio-leds";
24
25 power {
26 label = "cs-qr10:red:power";
27 gpios = <&gpio1 4 1>;
28 };
29 };
30
31 gpio-keys-polled {
32 compatible = "gpio-keys-polled";
33 #address-cells = <1>;
34 #size-cells = <0>;
35 poll-interval = <20>;
36
37 s1 {
38 label = "reset";
39 gpios = <&gpio1 1 1>;
40 linux,code = <KEY_RESTART>;
41 };
42
43 s2 {
44 label = "wps";
45 gpios = <&gpio1 3 1>;
46 linux,code = <KEY_WPS_BUTTON>;
47 };
48 };
49 };
50
51 &gpio0 {
52 status = "okay";
53 };
54
55 &gpio1 {
56 status = "okay";
57 };
58
59 &gpio2 {
60 status = "okay";
61 };
62
63 &gpio3 {
64 status = "okay";
65 };
66
67 &i2c {
68 status = "okay";
69 };
70
71 &i2s {
72 status = "okay";
73 pinctrl-names = "default";
74 pinctrl-0 = <&pcm_i2s_pins>;
75 };
76
77 &spi0 {
78 status = "okay";
79
80 m25p80@0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "jedec,spi-nor";
84 reg = <0>;
85 linux,modalias = "m25p80", "mx25l6405d";
86 spi-max-frequency = <10000000>;
87
88 partition@0 {
89 label = "u-boot";
90 reg = <0x0 0x30000>;
91 read-only;
92 };
93
94 partition@30000 {
95 label = "u-boot-env";
96 reg = <0x30000 0x10000>;
97 read-only;
98 };
99
100 factory: partition@40000 {
101 label = "factory";
102 reg = <0x40000 0x10000>;
103 read-only;
104 };
105
106 partition@50000 {
107 label = "firmware";
108 reg = <0x50000 0x7b0000>;
109 };
110 };
111 };
112
113 &pcm {
114 status = "okay";
115 };
116
117 &gdma {
118 status = "okay";
119 };
120
121 &pinctrl {
122 state_default: pinctrl0 {
123 gpio {
124 ralink,group = "spi refclk", "rgmii1";
125 ralink,function = "gpio";
126 };
127 wdt {
128 ralink,group = "wdt";
129 ralink,function = "wdt refclk";
130 };
131 };
132 };
133
134 &ethernet {
135 pinctrl-names = "default";
136 pinctrl-0 = <&ephy_pins>;
137 mtd-mac-address = <&factory 0x4>;
138 mediatek,portmap = "llllw";
139 };
140
141 &gsw {
142 ralink,port4 = "ephy";
143 };
144
145 &sdhci {
146 status = "okay";
147 };
148
149 &ehci {
150 status = "okay";
151 };
152
153 &ohci {
154 status = "okay";
155 };
156
157 &wmac {
158 ralink,mtd-eeprom = <&factory 0>;
159 };
160
161 &pcie {
162 status = "okay";
163 };