kernel: update kernel 3.18 to version 3.18.23
[openwrt/staging/chunkeey.git] / target / linux / ramips / patches-3.18 / 0300-mt7628_fixes.patch
1 --- a/arch/mips/ralink/mt7620.c
2 +++ b/arch/mips/ralink/mt7620.c
3 @@ -101,28 +101,28 @@ static struct rt2880_pmx_group mt7620a_p
4 };
5
6 static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
7 - FUNC("sdxc", 3, 19, 1),
8 + FUNC("sdxc d6", 3, 19, 1),
9 FUNC("utif", 2, 19, 1),
10 FUNC("gpio", 1, 19, 1),
11 - FUNC("pwm", 0, 19, 1),
12 + FUNC("pwm1", 0, 19, 1),
13 };
14
15 static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
16 - FUNC("sdxc", 3, 18, 1),
17 + FUNC("sdxc d7", 3, 18, 1),
18 FUNC("utif", 2, 18, 1),
19 FUNC("gpio", 1, 18, 1),
20 - FUNC("pwm", 0, 18, 1),
21 + FUNC("pwm0", 0, 18, 1),
22 };
23
24 static struct rt2880_pmx_func uart2_grp_mt7628[] = {
25 - FUNC("sdxc", 3, 20, 2),
26 + FUNC("sdxc d5 d4", 3, 20, 2),
27 FUNC("pwm", 2, 20, 2),
28 FUNC("gpio", 1, 20, 2),
29 FUNC("uart2", 0, 20, 2),
30 };
31
32 static struct rt2880_pmx_func uart1_grp_mt7628[] = {
33 - FUNC("sdxc", 3, 45, 2),
34 + FUNC("sw_r", 3, 45, 2),
35 FUNC("pwm", 2, 45, 2),
36 FUNC("gpio", 1, 45, 2),
37 FUNC("uart1", 0, 45, 2),
38 @@ -165,7 +165,7 @@ static struct rt2880_pmx_func spi_cs1_gr
39 FUNC("-", 3, 6, 1),
40 FUNC("refclk", 2, 6, 1),
41 FUNC("gpio", 1, 6, 1),
42 - FUNC("spi", 0, 6, 1),
43 + FUNC("spi cs1", 0, 6, 1),
44 };
45
46 static struct rt2880_pmx_func spis_grp_mt7628[] = {
47 @@ -182,27 +182,43 @@ static struct rt2880_pmx_func gpio_grp_m
48 FUNC("gpio", 0, 11, 1),
49 };
50
51 -#define MT7628_GPIO_MODE_MASK 0x3
52 -
53 -#define MT7628_GPIO_MODE_PWM1 30
54 -#define MT7628_GPIO_MODE_PWM0 28
55 -#define MT7628_GPIO_MODE_UART2 26
56 -#define MT7628_GPIO_MODE_UART1 24
57 -#define MT7628_GPIO_MODE_I2C 20
58 -#define MT7628_GPIO_MODE_REFCLK 18
59 -#define MT7628_GPIO_MODE_PERST 16
60 -#define MT7628_GPIO_MODE_WDT 14
61 -#define MT7628_GPIO_MODE_SPI 12
62 -#define MT7628_GPIO_MODE_SDMODE 10
63 -#define MT7628_GPIO_MODE_UART0 8
64 -#define MT7628_GPIO_MODE_I2S 6
65 -#define MT7628_GPIO_MODE_CS1 4
66 -#define MT7628_GPIO_MODE_SPIS 2
67 -#define MT7628_GPIO_MODE_GPIO 0
68 +static struct rt2880_pmx_func wled_kn_grp_mt7628[] = {
69 + FUNC("rsvd", 3, 35, 1),
70 + FUNC("rsvd", 2, 35, 1),
71 + FUNC("gpio", 1, 35, 1),
72 + FUNC("wled_kn", 0, 35, 1),
73 +};
74 +
75 +static struct rt2880_pmx_func wled_an_grp_mt7628[] = {
76 + FUNC("rsvd", 3, 35, 1),
77 + FUNC("rsvd", 2, 35, 1),
78 + FUNC("gpio", 1, 35, 1),
79 + FUNC("wled_an", 0, 35, 1),
80 +};
81 +
82 +#define MT7628_GPIO_MODE_MASK 0x3
83 +
84 +#define MT7628_GPIO_MODE_WLED_KN 48
85 +#define MT7628_GPIO_MODE_WLED_AN 32
86 +#define MT7628_GPIO_MODE_PWM1 30
87 +#define MT7628_GPIO_MODE_PWM0 28
88 +#define MT7628_GPIO_MODE_UART2 26
89 +#define MT7628_GPIO_MODE_UART1 24
90 +#define MT7628_GPIO_MODE_I2C 20
91 +#define MT7628_GPIO_MODE_REFCLK 18
92 +#define MT7628_GPIO_MODE_PERST 16
93 +#define MT7628_GPIO_MODE_WDT 14
94 +#define MT7628_GPIO_MODE_SPI 12
95 +#define MT7628_GPIO_MODE_SDMODE 10
96 +#define MT7628_GPIO_MODE_UART0 8
97 +#define MT7628_GPIO_MODE_I2S 6
98 +#define MT7628_GPIO_MODE_CS1 4
99 +#define MT7628_GPIO_MODE_SPIS 2
100 +#define MT7628_GPIO_MODE_GPIO 0
101
102 static struct rt2880_pmx_group mt7628an_pinmux_data[] = {
103 - GRP_G("pmw1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM1),
104 - GRP_G("pmw0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM0),
105 + GRP_G("pwm1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM1),
106 + GRP_G("pwm0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM0),
107 GRP_G("uart2", uart2_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART2),
108 GRP_G("uart1", uart1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART1),
109 GRP_G("i2c", i2c_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_I2C),
110 @@ -216,6 +232,8 @@ static struct rt2880_pmx_group mt7628an_
111 GRP_G("spi cs1", spi_cs1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_CS1),
112 GRP_G("spis", spis_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_SPIS),
113 GRP_G("gpio", gpio_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_GPIO),
114 + GRP_G("wled_an", wled_an_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_WLED_AN),
115 + GRP_G("wled_kn", wled_kn_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_WLED_KN),
116 { 0 }
117 };
118
119 @@ -529,7 +547,11 @@ void prom_soc_init(struct ralink_soc_inf
120 (rev & CHIP_REV_ECO_MASK));
121
122 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
123 - dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
124 +
125 + if (ralink_soc == MT762X_SOC_MT7628AN)
126 + dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
127 + else
128 + dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
129
130 soc_info->mem_base = MT7620_DRAM_BASE;
131 if (ralink_soc == MT762X_SOC_MT7628AN)