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Split up drivers and specific files, update flash map driver
[openwrt/staging/chunkeey.git] / target / linux / rdc-2.6 / files / drivers / net / r6040.c
1 /* rdc.c: A RDC FastEthernet driver for linux. */
2 /*
3 Re-written 2004 by Sten Wang.
4
5 Copyright 1994-2000 by Donald Becker.
6 Copyright 1993 United States Government as represented by the
7 Director, National Security Agency. This software may be used and
8 distributed according to the terms of the GNU General Public License,
9 incorporated herein by reference.
10
11 This driver is for RDC FastEthernet MAC series.
12 For kernel version after 2.4.22
13
14 Modification List
15 ---------- ------------------------------------------------
16 12-22-2004 Sten Init MAC MBCR register=0x012A
17 PHY_CAP = 0x01E1
18 */
19
20 #define FORICPLUS /* Supports ICPlus IP175C switch chip */
21 #define BOOSTRDC /* Accelerate Ethernet performance */
22
23 #define DRV_NAME "rdc"
24 #define DRV_VERSION "0.6"
25 #define DRV_RELDATE "9July2004"
26
27 /* PHY CHIP Address */
28 #define PHY1_ADDR 1 /* For MAC1 */
29 #define PHY2_ADDR 2 /* For MAC2 */
30 #define PHY_MODE 0x3100 /* PHY CHIP Register 0 */
31 #define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */
32
33 /* Time in jiffies before concluding the transmitter is hung. */
34 #define TX_TIMEOUT (400 * HZ / 1000)
35 #define TIMER_WUT (jiffies + HZ * 1)/* timer wakeup time : 1 second */
36
37 /* RDC MAC ID */
38 #define RDC_MAC_ID 0x6040
39
40 /* RDC MAC I/O Size */
41 #define R6040_IO_SIZE 256
42
43 /* RDC Chip PCI Command */
44 #define R6040_PCI_CMD 0x0005 /* IO, Master */
45
46 /* MAX RDC MAC */
47 #define MAX_MAC 2
48
49 /* MAC setting */
50 #ifdef BOOSTRDC
51 #define TX_DCNT 32 /* TX descriptor count */
52 #define RX_DCNT 32 /* RX descriptor count */
53 #else
54 #define TX_DCNT 0x8 /* TX descriptor count */
55 #define RX_DCNT 0x8 /* RX descriptor count */
56 #endif
57 #define MAX_BUF_SIZE 0x600
58 #define ALLOC_DESC_SIZE ((TX_DCNT+RX_DCNT)*sizeof(struct rdc_descriptor)+0x10)
59 #define MBCR_DEFAULT 0x012A /* MAC Control Register */
60
61 /* Debug enable or not */
62 #define RDC_DEBUG 0
63
64 #if RDC_DEBUG > 1
65 #define RDC_DBUG(msg, value) printk("%s %x\n", msg, value);
66 #else
67 #define RDC_DBUG(msg, value)
68 #endif
69
70
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/string.h>
74 #include <linux/timer.h>
75 #include <linux/errno.h>
76 #include <linux/ioport.h>
77 #include <linux/slab.h>
78 #include <linux/interrupt.h>
79 #include <linux/pci.h>
80 #include <linux/netdevice.h>
81 #include <linux/etherdevice.h>
82 #include <linux/skbuff.h>
83 #include <linux/init.h>
84 #include <linux/delay.h> /* for udelay() */
85 #include <linux/mii.h>
86 #include <linux/ethtool.h>
87 #include <linux/crc32.h>
88 #include <linux/spinlock.h>
89
90 #include <asm/processor.h>
91 #include <asm/bitops.h>
92 #include <asm/io.h>
93 #include <asm/irq.h>
94 #include <asm/uaccess.h>
95
96 MODULE_AUTHOR("Sten Wang <sten.wang@rdc.com.tw>");
97 MODULE_DESCRIPTION("RDC R6040 PCI FastEthernet Driver");
98 MODULE_LICENSE("GPL");
99
100 //MODULE_PARM(adr_table, "2-4i");
101 MODULE_PARM_DESC(adr_table, "MAC Address (assigned)");
102
103 struct rdc_descriptor {
104 u16 status, len; /* 0-3 */
105 u32 buf; /* 4-7 */
106 u32 ndesc; /* 8-B */
107 u32 rev1; /* C-F */
108 char *vbufp; /* 10-13 */
109 struct rdc_descriptor *vndescp; /* 14-17 */
110 struct sk_buff *skb_ptr; /* 18-1B */
111 u32 rev2; /* 1C-1F */
112 } __attribute__(( aligned(32) ));
113
114 struct rdc_private {
115 struct net_device_stats stats;
116 spinlock_t lock;
117 struct timer_list timer;
118 struct pci_dev *pdev;
119
120 struct rdc_descriptor *rx_insert_ptr;
121 struct rdc_descriptor *rx_remove_ptr;
122 struct rdc_descriptor *tx_insert_ptr;
123 struct rdc_descriptor *tx_remove_ptr;
124 u16 tx_free_desc, rx_free_desc, phy_addr, phy_mode;
125 u16 mcr0, mcr1;
126 dma_addr_t desc_dma;
127 char *desc_pool;
128 };
129
130 struct rdc_chip_info {
131 const char *name;
132 u16 pci_flags;
133 int io_size;
134 int drv_flags;
135 };
136
137 static int __devinitdata printed_version;
138 static char version[] __devinitdata =
139 KERN_INFO DRV_NAME ": RDC R6040 net driver, version "
140 DRV_VERSION " (" DRV_RELDATE ")\n";
141
142 static struct rdc_chip_info rdc_chip_info[] __devinitdata =
143 {
144 { "RDC R6040 Knight", R6040_PCI_CMD, R6040_IO_SIZE, 0}
145 };
146
147 static int phy_table[] = { 0x1, 0x2};
148 static u8 adr_table[2][8] = {{0x00, 0x00, 0x60, 0x00, 0x00, 0x01}, {0x00, 0x00, 0x60, 0x00, 0x00, 0x02}};
149
150 static int rdc_open(struct net_device *dev);
151 static int rdc_start_xmit(struct sk_buff *skb, struct net_device *dev);
152 static irqreturn_t rdc_interrupt(int irq, void *dev_id);
153 static struct net_device_stats *rdc_get_stats(struct net_device *dev);
154 static int rdc_close(struct net_device *dev);
155 static void set_multicast_list(struct net_device *dev);
156 static struct ethtool_ops netdev_ethtool_ops;
157 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
158 static void rdc_down(struct net_device *dev);
159 static void rdc_up(struct net_device *dev);
160 static void rdc_tx_timeout (struct net_device *dev);
161 static void rdc_timer(unsigned long);
162
163 static int phy_mode_chk(struct net_device *dev);
164 static int phy_read(int ioaddr, int phy_adr, int reg_idx);
165 static void phy_write(int ioaddr, int phy_adr, int reg_idx, int dat);
166
167 #ifdef BOOSTRDC
168 #define rx_buf_alloc(lp) \
169 do { \
170 struct rdc_descriptor *descptr; \
171 descptr = lp->rx_insert_ptr; \
172 while(lp->rx_free_desc < RX_DCNT){ \
173 descptr->skb_ptr = dev_alloc_skb(MAX_BUF_SIZE); \
174 if (!descptr->skb_ptr) break; \
175 descptr->buf = cpu_to_le32(pci_map_single(lp->pdev, descptr->skb_ptr->tail, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE)); \
176 descptr->status = 0x8000; \
177 descptr = descptr->vndescp; \
178 lp->rx_free_desc++; \
179 } \
180 lp->rx_insert_ptr = descptr; \
181 } while(0)
182
183 #else
184 static void rx_buf_alloc(struct rdc_private *lp);
185 #endif
186
187 #ifdef FORICPLUS
188 static void process_ioctl(struct net_device*, unsigned long* );
189 #endif
190
191 static int __devinit rdc_init_one (struct pci_dev *pdev,
192 const struct pci_device_id *ent)
193 {
194 struct net_device *dev;
195 struct rdc_private *lp;
196 int ioaddr, io_size, err;
197 static int card_idx = -1;
198 int chip_id = (int)ent->driver_data;
199
200 RDC_DBUG("rdc_init_one()", 0);
201
202 if (printed_version++)
203 printk(version);
204
205 if ((err = pci_enable_device (pdev)))
206 return err;
207
208 /* this should always be supported */
209 if (pci_set_dma_mask(pdev, 0xffffffff)) {
210 printk(KERN_ERR DRV_NAME "32-bit PCI DMA addresses not supported by the card!?\n");
211 return -ENODEV;
212 }
213
214 /* IO Size check */
215 io_size = rdc_chip_info[chip_id].io_size;
216 if (pci_resource_len (pdev, 0) < io_size) {
217 return -ENODEV;
218 }
219
220 ioaddr = pci_resource_start (pdev, 0); /* IO map base address */
221 pci_set_master(pdev);
222
223 dev = alloc_etherdev(sizeof(struct rdc_private));
224 if (dev == NULL)
225 return -ENOMEM;
226 SET_MODULE_OWNER(dev);
227
228 if (pci_request_regions(pdev, DRV_NAME)) {
229 printk(KERN_ERR DRV_NAME ": Failed to request PCI regions\n");
230 err = -ENODEV;
231 goto err_out_disable;
232 }
233
234 /* Init system & device */
235 lp = dev->priv;
236 dev->base_addr = ioaddr;
237 dev->irq = pdev->irq;
238
239 spin_lock_init(&lp->lock);
240 pci_set_drvdata(pdev, dev);
241
242 /* Set MAC address */
243 card_idx++;
244 memcpy(dev->dev_addr, (u8 *)&adr_table[card_idx][0], 6);
245
246 /* Link new device into rdc_root_dev */
247 lp->pdev = pdev;
248
249 /* Init RDC private data */
250 lp->mcr0 = 0x1002;
251 lp->phy_addr = phy_table[card_idx];
252
253 /* The RDC-specific entries in the device structure. */
254 dev->open = &rdc_open;
255 dev->hard_start_xmit = &rdc_start_xmit;
256 dev->stop = &rdc_close;
257 dev->get_stats = &rdc_get_stats;
258 dev->set_multicast_list = &set_multicast_list;
259 dev->do_ioctl = &netdev_ioctl;
260 dev->ethtool_ops = &netdev_ethtool_ops;
261 dev->tx_timeout = &rdc_tx_timeout;
262 dev->watchdog_timeo = TX_TIMEOUT;
263
264 /* Register net device. After this dev->name assign */
265 if ((err = register_netdev(dev))) {
266 printk(KERN_ERR DRV_NAME ": Failed to register net device\n");
267 goto err_out_res;
268 }
269
270 netif_carrier_on(dev);
271 return 0;
272
273 err_out_res:
274 pci_release_regions(pdev);
275 err_out_disable:
276 pci_disable_device(pdev);
277 pci_set_drvdata(pdev, NULL);
278 kfree(dev);
279
280 return err;
281 }
282
283 static void __devexit rdc_remove_one (struct pci_dev *pdev)
284 {
285 struct net_device *dev = pci_get_drvdata(pdev);
286
287 unregister_netdev(dev);
288 pci_release_regions(pdev);
289 kfree(dev);
290 pci_disable_device(pdev);
291 pci_set_drvdata(pdev, NULL);
292 }
293
294 static int
295 rdc_open(struct net_device *dev)
296 {
297 struct rdc_private *lp = dev->priv;
298 int i;
299
300 RDC_DBUG("rdc_open()", 0);
301
302 /* Request IRQ and Register interrupt handler */
303 i = request_irq(dev->irq, &rdc_interrupt, SA_SHIRQ, dev->name, dev);
304 if (i) return i;
305
306 /* Allocate Descriptor memory */
307 lp->desc_pool = pci_alloc_consistent(lp->pdev, ALLOC_DESC_SIZE, &lp->desc_dma);
308 if (!lp->desc_pool) return -ENOMEM;
309
310 rdc_up(dev);
311
312 netif_start_queue(dev);
313
314 #ifndef FORICPLUS
315 /* set and active a timer process */
316 init_timer(&lp->timer);
317 lp->timer.expires = TIMER_WUT;
318 lp->timer.data = (unsigned long)dev;
319 lp->timer.function = &rdc_timer;
320 add_timer(&lp->timer);
321 #endif
322
323 return 0;
324 }
325
326 static void
327 rdc_tx_timeout (struct net_device *dev)
328 {
329 struct rdc_private *lp = dev->priv;
330 //int ioaddr = dev->base_addr;
331 //struct rdc_descriptor *descptr = lp->tx_remove_ptr;
332
333 RDC_DBUG("rdc_tx_timeout()", 0);
334
335 /* Transmitter timeout, serious problems. */
336 /* Sten: Nothing need to do so far. */
337 printk(KERN_ERR DRV_NAME ": Big Trobule, transmit timeout/n");
338 lp->stats.tx_errors++;
339 netif_stop_queue(dev);
340
341 //printk("<RDC> XMT timedout: CR0 %x, CR40 %x, CR3C %x, CR2C %x, CR30 %x, CR34 %x, CR38 %x\n", inw(ioaddr), inw(ioaddr+0x40), inw(ioaddr+0x3c), inw(ioaddr+0x2c), inw(ioaddr+0x30), inw(ioaddr+0x34), inw(ioaddr+0x38));
342
343 //printk("<RDC> XMT_TO: %08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
344 }
345
346
347 static int
348 rdc_start_xmit(struct sk_buff *skb, struct net_device *dev)
349 {
350 struct rdc_private *lp = dev->priv;
351 struct rdc_descriptor *descptr;
352 int ioaddr = dev->base_addr;
353 unsigned long flags;
354
355 RDC_DBUG("rdc_start_xmit()", 0);
356
357 if (skb == NULL) /* NULL skb directly return */
358 return 0;
359 if (skb->len >= MAX_BUF_SIZE) { /* Packet too long, drop it */
360 dev_kfree_skb(skb);
361 return 0;
362 }
363
364 /* Critical Section */
365 spin_lock_irqsave(&lp->lock, flags);
366
367 /* TX resource check */
368 if (!lp->tx_free_desc) {
369 spin_unlock_irqrestore(&lp->lock, flags);
370 printk(KERN_ERR DRV_NAME ": NO TX DESC ");
371 return 1;
372 }
373
374 /* Statistic Counter */
375 lp->stats.tx_packets++;
376 lp->stats.tx_bytes += skb->len;
377
378 /* Set TX descriptor & Transmit it */
379 lp->tx_free_desc--;
380 descptr = lp->tx_insert_ptr;
381 if (skb->len < 0x3c) descptr->len = 0x3c;
382 else descptr->len = skb->len;
383 descptr->skb_ptr = skb;
384 descptr->buf = cpu_to_le32(pci_map_single(lp->pdev, skb->data, skb->len, PCI_DMA_TODEVICE));
385 descptr->status = 0x8000;
386 outw(0x01, ioaddr + 0x14);
387 lp->tx_insert_ptr = descptr->vndescp;
388
389 #if RDC_DEBUG
390 printk("Xmit(): %08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
391 #endif
392
393 /* If no tx resource, stop */
394 if (!lp->tx_free_desc)
395 netif_stop_queue(dev);
396
397 dev->trans_start = jiffies;
398 spin_unlock_irqrestore(&lp->lock, flags);
399 return 0;
400 }
401
402 /* The RDC interrupt handler. */
403 static irqreturn_t
404 rdc_interrupt(int irq, void *dev_id)
405 {
406 struct net_device *dev = dev_id;
407 struct rdc_private *lp;
408 struct rdc_descriptor *descptr;
409 struct sk_buff *skb_ptr;
410 int ioaddr, status;
411 unsigned long flags;
412 int handled = 0;
413
414 RDC_DBUG("rdc_interrupt()", 0);
415 if (dev == NULL) {
416 printk (KERN_ERR DRV_NAME ": INT() unknown device.\n");
417 return IRQ_RETVAL(handled);
418 }
419
420 lp = (struct rdc_private *)dev->priv;
421 spin_lock_irqsave(&lp->lock, flags);
422
423 /* Check MAC Interrupt status */
424 ioaddr = dev->base_addr;
425 outw(0x0, ioaddr + 0x40); /* Mask Off RDC MAC interrupt */
426 status = inw(ioaddr + 0x3c); /* Read INTR status and clear */
427
428 /* TX interrupt request */
429 if (status & 0x10) {
430 handled = 1;
431 descptr = lp->tx_remove_ptr;
432 while(lp->tx_free_desc < TX_DCNT) {
433 if (descptr->status & 0x8000) break; /* Not complte */
434 skb_ptr = descptr->skb_ptr;
435 pci_unmap_single(lp->pdev, descptr->buf, skb_ptr->len, PCI_DMA_TODEVICE);
436 dev_kfree_skb_irq(skb_ptr); /* Free buffer */
437 descptr->skb_ptr = 0;
438 descptr = descptr->vndescp; /* To next descriptor */
439 lp->tx_free_desc++;
440 }
441 lp->tx_remove_ptr = descptr;
442 if (lp->tx_free_desc) netif_wake_queue(dev);
443 }
444
445 /* RX interrupt request */
446 if (status & 0x01) {
447 handled = 1;
448 descptr = lp->rx_remove_ptr;
449 while(lp->rx_free_desc) {
450 if (descptr->status & 0x8000) break; /* No Rx packet */
451 skb_ptr = descptr->skb_ptr;
452 descptr->skb_ptr = 0;
453 skb_ptr->dev = dev;
454 skb_put(skb_ptr, descptr->len - 4);
455 pci_unmap_single(lp->pdev, descptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
456 skb_ptr->protocol = eth_type_trans(skb_ptr, dev);
457 netif_rx(skb_ptr); /* Send to upper layer */
458 lp->stats.rx_packets++;
459 lp->stats.rx_bytes += descptr->len;
460 descptr = descptr->vndescp; /* To next descriptor */
461 lp->rx_free_desc--;
462 }
463 lp->rx_remove_ptr = descptr;
464 }
465
466 /* Allocate new RX buffer */
467 if (lp->rx_free_desc < RX_DCNT) rx_buf_alloc(lp);
468
469 outw(0x0011, ioaddr + 0x40); /* TX/RX interrupt enable */
470 spin_unlock_irqrestore(&lp->lock, flags);
471
472 return IRQ_RETVAL(handled);
473 }
474
475
476 static struct net_device_stats *
477 rdc_get_stats(struct net_device *dev)
478 {
479 struct rdc_private *lp = dev->priv;
480
481 RDC_DBUG("rdc_get_stats()", 0);
482 return &lp->stats;
483 }
484
485 /*
486 * Set or clear the multicast filter for this adaptor.
487 */
488 static void
489 set_multicast_list(struct net_device *dev)
490 {
491 struct rdc_private *lp = dev->priv;
492 struct dev_mc_list *mcptr;
493 int ioaddr = dev->base_addr;
494 u16 *adrp, i;
495 unsigned long flags;
496
497 RDC_DBUG("set_multicast_list()", 0);
498
499 /* MAC Address */
500 ioaddr += 0x68;
501 adrp = (u16 *) dev->dev_addr;
502 outw(adrp[0], ioaddr); ioaddr += 2;
503 outw(adrp[1], ioaddr); ioaddr += 2;
504 outw(adrp[2], ioaddr); ioaddr += 2;
505
506 #if RDC_DEBUG
507 printk("MAC ADDR: %04x %04x %04x\n", adrp[0], adrp[1], adrp[2]);
508 #endif
509
510 /* Promiscous Mode */
511 spin_lock_irqsave(lp->lock, flags);
512 i = inw(ioaddr) & ~0x0120; /* Clear AMCP & PROM */
513 if (dev->flags & IFF_PROMISC) i |= 0x0020;
514 if (dev->mc_count > 4) i |= 0x0100; /* Too many multicast address */
515 outw(i, ioaddr);
516 spin_unlock_irqrestore(lp->lock, flags);
517
518 /* Multicast Address */
519 if (dev->mc_count > 4) /* Wait to do: Hash Table for multicast */
520 return;
521
522 /* Multicast Address 1~4 case */
523 for (i = 0, mcptr = dev->mc_list; (i<dev->mc_count) && (i<4); i++) {
524 adrp = (u16 *)mcptr->dmi_addr;
525 outw(adrp[0], ioaddr); ioaddr += 2;
526 outw(adrp[1], ioaddr); ioaddr += 2;
527 outw(adrp[2], ioaddr); ioaddr += 2;
528 mcptr = mcptr->next;
529 #if RDC_DEBUG
530 printk("M_ADDR: %04x %04x %04x\n", adrp[0], adrp[1], adrp[2]);
531 #endif
532 }
533 for (i = dev->mc_count; i < 4; i++) {
534 outw(0xffff, ioaddr); ioaddr += 2;
535 outw(0xffff, ioaddr); ioaddr += 2;
536 outw(0xffff, ioaddr); ioaddr += 2;
537 }
538 }
539
540 static void netdev_get_drvinfo (struct net_device *dev, struct ethtool_drvinfo *info)
541 {
542 struct rdc_private *rp = dev->priv;
543
544 strcpy (info->driver, DRV_NAME);
545 strcpy (info->version, DRV_VERSION);
546 strcpy (info->bus_info, pci_name(rp->pdev));
547 }
548
549 static struct ethtool_ops netdev_ethtool_ops = {
550 .get_drvinfo = netdev_get_drvinfo,
551 };
552
553 static int
554 rdc_close(struct net_device *dev)
555 {
556 struct rdc_private *lp = dev->priv;
557
558 RDC_DBUG("rdc_close()", 0);
559
560 /* deleted timer */
561 del_timer_sync(&lp->timer);
562
563 spin_lock_irq(&lp->lock);
564
565 netif_stop_queue(dev);
566
567 rdc_down(dev);
568
569 spin_unlock_irq(&lp->lock);
570
571 return 0;
572 }
573
574 /**
575 */
576 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
577 {
578 RDC_DBUG("netdev_ioctl()", 0);
579
580 #ifdef FORICPLUS
581 switch(cmd)
582 {
583 case SIOCDEVPRIVATE:
584
585 //printk(KERN_INFO"Ethernet IOCTL: cmd SIOCDEVPRIVATE\n");
586 {
587 unsigned long *data;
588 unsigned long args[4];
589
590 data = (unsigned long *)rq->ifr_data;
591 if (copy_from_user(args, data, 4*sizeof(unsigned long)))
592 return -EFAULT;
593
594 process_ioctl(dev, args);
595 }
596 break;
597
598 default:
599 break;
600 }
601 #endif
602 return 0;
603 }
604
605 /**
606 Stop RDC MAC and Free the allocated resource
607 */
608 static void rdc_down(struct net_device *dev)
609 {
610 struct rdc_private *lp = dev->priv;
611 int i;
612 int ioaddr = dev->base_addr;
613
614 RDC_DBUG("rdc_down()", 0);
615
616 /* Stop MAC */
617 outw(0x0000, ioaddr + 0x40); /* Mask Off Interrupt */
618 outw(0x0001, ioaddr + 0x04); /* Reset RDC MAC */
619 i = 0;
620 do{}while((i++ < 2048) && (inw(ioaddr + 0x04) & 0x1));
621
622 free_irq(dev->irq, dev);
623
624 /* Free RX buffer */
625 for (i = 0; i < RX_DCNT; i++) {
626 if (lp->rx_insert_ptr->skb_ptr) {
627 pci_unmap_single(lp->pdev, lp->rx_insert_ptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
628 dev_kfree_skb(lp->rx_insert_ptr->skb_ptr);
629 lp->rx_insert_ptr->skb_ptr = 0;
630 }
631 lp->rx_insert_ptr = lp->rx_insert_ptr->vndescp;
632 }
633
634 /* Free TX buffer */
635 for (i = 0; i < TX_DCNT; i++) {
636 if (lp->tx_insert_ptr->skb_ptr) {
637 pci_unmap_single(lp->pdev, lp->tx_insert_ptr->buf, MAX_BUF_SIZE, PCI_DMA_TODEVICE);
638 dev_kfree_skb(lp->tx_insert_ptr->skb_ptr);
639 lp->rx_insert_ptr->skb_ptr = 0;
640 }
641 lp->tx_insert_ptr = lp->tx_insert_ptr->vndescp;
642 }
643
644 /* Free Descriptor memory */
645 pci_free_consistent(lp->pdev, ALLOC_DESC_SIZE, lp->desc_pool, lp->desc_dma);
646 }
647
648 /* Init RDC MAC */
649 static void rdc_up(struct net_device *dev)
650 {
651 struct rdc_private *lp = dev->priv;
652 struct rdc_descriptor *descptr;
653 int i;
654 int ioaddr = dev->base_addr;
655 u32 tmp_addr;
656 dma_addr_t desc_dma, start_dma;
657
658 RDC_DBUG("rdc_up()", 0);
659
660 /* Initilize */
661 lp->tx_free_desc = TX_DCNT;
662 lp->rx_free_desc = 0;
663
664 /* Init descriptor */
665 memset(lp->desc_pool, 0, ALLOC_DESC_SIZE); /* Let all descriptor = 0 */
666 lp->tx_insert_ptr = (struct rdc_descriptor *)lp->desc_pool;
667 lp->tx_remove_ptr = lp->tx_insert_ptr;
668 lp->rx_insert_ptr = (struct rdc_descriptor *)lp->tx_insert_ptr+TX_DCNT;
669 lp->rx_remove_ptr = lp->rx_insert_ptr;
670
671 /* Init TX descriptor */
672 descptr = lp->tx_insert_ptr;
673 desc_dma = lp->desc_dma;
674 start_dma = desc_dma;
675 for (i = 0; i < TX_DCNT; i++) {
676 descptr->ndesc = cpu_to_le32(desc_dma + sizeof(struct rdc_descriptor));
677 descptr->vndescp = (descptr + 1);
678 descptr = (descptr + 1);
679 desc_dma += sizeof(struct rdc_descriptor);
680 }
681 (descptr - 1)->ndesc = cpu_to_le32(start_dma);
682 (descptr - 1)->vndescp = lp->tx_insert_ptr;
683
684 /* Init RX descriptor */
685 start_dma = desc_dma;
686 descptr = lp->rx_insert_ptr;
687 for (i = 0; i < RX_DCNT; i++) {
688 descptr->ndesc = cpu_to_le32(desc_dma + sizeof(struct rdc_descriptor));
689 descptr->vndescp = (descptr + 1);
690 descptr = (descptr + 1);
691 desc_dma += sizeof(struct rdc_descriptor);
692 }
693 (descptr - 1)->ndesc = cpu_to_le32(start_dma);
694 (descptr - 1)->vndescp = lp->rx_insert_ptr;
695
696 /* Allocate buffer for RX descriptor */
697 rx_buf_alloc(lp);
698
699 #if RDC_DEBUG
700 descptr = lp->tx_insert_ptr;
701 for (i = 0; i < TX_DCNT; i++) {
702 printk("%08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
703 descptr = descptr->vndescp;
704 }
705 descptr = lp->rx_insert_ptr;
706 for (i = 0; i < RX_DCNT; i++) {
707 printk("%08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
708 descptr = descptr->vndescp;
709 }
710 #endif
711
712 /* MAC operation register */
713 outw(0x01, ioaddr); /* Reset MAC */
714 outw(2 , ioaddr+0xAC);
715 outw(0 , ioaddr+0xAC);
716 udelay(5000);
717
718 /* TX and RX descriptor start Register */
719 tmp_addr = cpu_to_le32(lp->tx_insert_ptr);
720 //timc
721 tmp_addr = virt_to_bus((volatile void *)tmp_addr);
722 outw((u16) tmp_addr, ioaddr+0x2c);
723 outw(tmp_addr >> 16, ioaddr+0x30);
724 tmp_addr = cpu_to_le32(lp->rx_insert_ptr);
725 //timc
726 tmp_addr = virt_to_bus((volatile void *)tmp_addr);
727 outw((u16) tmp_addr, ioaddr+0x34);
728 outw(tmp_addr >> 16, ioaddr+0x38);
729
730 /* Buffer Size Register */
731 outw(MAX_BUF_SIZE, ioaddr+0x18);
732
733 #ifdef FORICPLUS
734
735 if(phy_read(ioaddr, 0, 2) == 0x0243) // ICPlus IP175C Signature
736 {
737 phy_write(ioaddr, 29,31, 0x175C); //Enable registers
738 }
739 lp->phy_mode = 0x8000;
740
741 #else
742 /* PHY Mode Check */
743 phy_write(ioaddr, lp->phy_addr, 4, PHY_CAP);
744 phy_write(ioaddr, lp->phy_addr, 0, PHY_MODE);
745
746 if (PHY_MODE == 0x3100)
747 lp->phy_mode = phy_mode_chk(dev);
748 else lp->phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
749 #endif
750 /* MAC Bus Control Register */
751 outw(MBCR_DEFAULT, ioaddr+0x8);
752
753 /* MAC TX/RX Enable */
754 lp->mcr0 |= lp->phy_mode;
755
756 // Dante
757 // BIT15 | BIT12 | BIT5 | BIT1
758 lp->mcr0 |= 0x0020;
759 //Xavier, only set promiscuous mode with eth1 (LAN i/f)
760 //This is a very bad hard code...
761 //if(ioaddr == 0xe900)lp->mcr0 |= 0x0020;
762
763 outw(lp->mcr0, ioaddr);
764
765 #ifdef BOOSTRDC
766 /* set interrupt waiting time and packet numbers */
767 outw(0x0802, ioaddr + 0x0C);
768 outw(0x0802, ioaddr + 0x10);
769
770 #ifdef FORICPLUS
771 /* upgrade performance (by RDC guys) */
772 phy_write(ioaddr,30,17,(phy_read(ioaddr,30,17)|0x4000)); //bit 14=1
773 phy_write(ioaddr,30,17,~((~phy_read(ioaddr,30,17))|0x2000)); //bit 13=0
774 phy_write(ioaddr,0,19,0x0000);
775 phy_write(ioaddr,0,30,0x01F0);
776 #endif
777 #endif
778
779 /* Interrupt Mask Register */
780 outw(0x0011, ioaddr + 0x40);
781 }
782
783 /*
784 A periodic timer routine
785 Polling PHY Chip Link Status
786 */
787 static void rdc_timer(unsigned long data)
788 {
789 struct net_device *dev=(struct net_device *)data;
790 struct rdc_private *lp = dev->priv;
791 u16 ioaddr = dev->base_addr, phy_mode;
792
793 RDC_DBUG("rdc_timer()", 0);
794
795 /* Polling PHY Chip Status */
796 if (PHY_MODE == 0x3100)
797 phy_mode = phy_mode_chk(dev);
798 else phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
799
800 if (phy_mode != lp->phy_mode) {
801 lp->phy_mode = phy_mode;
802 lp->mcr0 = (lp->mcr0 & 0x7fff) | phy_mode;
803 outw(lp->mcr0, ioaddr);
804 printk("<RDC> Link Change %x \n", inw(ioaddr));
805 }
806
807 /* Debug */
808 // printk("<RDC> Timer: CR0 %x CR40 %x CR3C %x\n", inw(ioaddr), inw(ioaddr+0x40), inw(ioaddr+0x3c));
809
810 /* Timer active again */
811 lp->timer.expires = TIMER_WUT;
812 add_timer(&lp->timer);
813 }
814
815 #ifndef BOOSTRDC
816 /* Allocate skb buffer for rx descriptor */
817 static void rx_buf_alloc(struct rdc_private *lp)
818 {
819 struct rdc_descriptor *descptr;
820
821 RDC_DBUG("rx_buf_alloc()", 0);
822 descptr = lp->rx_insert_ptr;
823 while(lp->rx_free_desc < RX_DCNT){
824 descptr->skb_ptr = dev_alloc_skb(MAX_BUF_SIZE);
825 if (!descptr->skb_ptr) break;
826 descptr->buf = cpu_to_le32(pci_map_single(lp->pdev, descptr->skb_ptr->tail, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE));
827 descptr->status = 0x8000;
828 descptr = descptr->vndescp;
829 lp->rx_free_desc++;
830 }
831 lp->rx_insert_ptr = descptr;
832 }
833 #endif
834
835 /* Status of PHY CHIP */
836 static int phy_mode_chk(struct net_device *dev)
837 {
838
839 struct rdc_private *lp = dev->priv;
840 int ioaddr = dev->base_addr, phy_dat;
841
842 RDC_DBUG("phy_mode_chk()", 0);
843
844 /* PHY Link Status Check */
845 phy_dat = phy_read(ioaddr, lp->phy_addr, 1);
846 if (!(phy_dat & 0x4)) return 0x8000; /* Link Failed, full duplex */
847
848 /* PHY Chip Auto-Negotiation Status */
849 phy_dat = phy_read(ioaddr, lp->phy_addr, 1);
850 if (phy_dat & 0x0020) {
851 /* Auto Negotiation Mode */
852 phy_dat = phy_read(ioaddr, lp->phy_addr, 5);
853 phy_dat &= phy_read(ioaddr, lp->phy_addr, 4);
854 if (phy_dat & 0x140) phy_dat = 0x8000;
855 else phy_dat = 0;
856 } else {
857 /* Force Mode */
858 phy_dat = phy_read(ioaddr, lp->phy_addr, 0);
859 if (phy_dat & 0x100) phy_dat = 0x8000;
860 else phy_dat = 0x0000;
861 }
862
863 return phy_dat;
864
865 };
866
867 /* Read a word data from PHY Chip */
868 static int phy_read(int ioaddr, int phy_addr, int reg_idx)
869 {
870 int i = 0;
871
872 RDC_DBUG("phy_read()", 0);
873 outw(0x2000 + reg_idx + (phy_addr << 8), ioaddr + 0x20);
874 do{}while( (i++ < 2048) && (inw(ioaddr + 0x20) & 0x2000) );
875
876 return inw(ioaddr + 0x24);
877 }
878
879 /* Write a word data from PHY Chip */
880 static void phy_write(int ioaddr, int phy_addr, int reg_idx, int dat)
881 {
882 int i = 0;
883
884 RDC_DBUG("phy_write()", 0);
885 outw(dat, ioaddr + 0x28);
886 outw(0x4000 + reg_idx + (phy_addr << 8), ioaddr + 0x20);
887 do{}while( (i++ < 2048) && (inw(ioaddr + 0x20) & 0x4000) );
888 }
889
890 enum {
891 RDC_6040 = 0
892 };
893
894 static struct pci_device_id rdc_pci_tbl[] = {
895 {0x17F3, 0x6040, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RDC_6040},
896 //{0x1106, 0x3065, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RDC_6040},
897 {0,} /* terminate list */
898 };
899 MODULE_DEVICE_TABLE(pci, rdc_pci_tbl);
900
901 static struct pci_driver rdc_driver = {
902 .name = "r6040",
903 .id_table = rdc_pci_tbl,
904 .probe = rdc_init_one,
905 .remove = __devexit_p(rdc_remove_one),
906 };
907
908
909 static int __init rdc_init (void)
910 {
911 RDC_DBUG("rdc_init()", 0);
912
913 printk(version);
914 printed_version = 1;
915
916 return pci_module_init (&rdc_driver);
917 }
918
919
920 static void __exit rdc_cleanup (void)
921 {
922 RDC_DBUG("rdc_cleanup()", 0);
923 pci_unregister_driver (&rdc_driver);
924 }
925
926 module_init(rdc_init);
927 module_exit(rdc_cleanup);
928
929
930 /*
931 * Local variables:
932 * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c rdc.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
933 * c-indent-level: 4
934 * c-basic-offset: 4
935 * tab-width: 4
936 * End:
937 */
938
939 #ifdef FORICPLUS
940 #define DMZ_GPIO 1
941 #define RDC3210_CFGREG_ADDR 0x0CF8
942 #define RDC3210_CFGREG_DATA 0x0CFC
943 static void process_ioctl(struct net_device *dev, unsigned long* args)
944 {
945 int ioaddr = dev->base_addr;
946
947 /* port priority */
948 if(args[0]&(1<<31))phy_write(ioaddr,29,19,(phy_read(ioaddr,29,19)|0x2000)); /* port 0 */
949 if(args[0]&(1<<29))phy_write(ioaddr,29,19,(phy_read(ioaddr,29,19)|0x0020)); /* port 1 */
950 if(args[0]&(1<<27))phy_write(ioaddr,29,20,(phy_read(ioaddr,29,20)|0x2000)); /* port 2 */
951 if(args[0]&(1<<25))phy_write(ioaddr,29,20,(phy_read(ioaddr,29,20)|0x0020)); /* port 3 */
952
953 /* DMZ LED */
954
955 {
956 unsigned int val;
957
958 val = 0x80000000 | (7 << 11) | ((0x48));
959 outl(val, RDC3210_CFGREG_ADDR);
960 udelay(10);
961 val = inl(RDC3210_CFGREG_DATA);
962
963 val |= (0x1 << DMZ_GPIO);
964 outl(val, RDC3210_CFGREG_DATA);
965 udelay(10);
966
967 val = 0x80000000 | (7 << 11) | ((0x4C));
968 outl(val, RDC3210_CFGREG_ADDR);
969 udelay(10);
970 val = inl(RDC3210_CFGREG_DATA);
971 if(args[0]&(1<<23)) /* DMZ enabled */
972 val &= ~(0x1 << DMZ_GPIO); /* low activated */
973 else val |= (0x1 << DMZ_GPIO);
974 outl(val, RDC3210_CFGREG_DATA);
975 udelay(10);
976 }
977
978
979 }
980 #endif /* FORICPLUS */
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