target/linux/sunxi/patches-4.14/040-arm64-dts-allwinner-a64-Add-watchdog.patch

   1 From d41850437c364ef7aba9bc25c1c701699d0240e0 Mon Sep 17 00:00:00 2001
   2 From: Harald Geyer <harald@ccbib.org>
   3 Date: Thu, 15 Mar 2018 16:25:07 +0000
   4 Subject: [PATCH] arm64: dts: allwinner: a64: Add watchdog
   5
   6 Add a watchdog node for the A64, automatically enabled on all boards.
   7 Since the device is compatible with an existing driver, we only reserve
   8 a new compatible string to be used together with the fall back.
   9 Tested on Olimex Teres-I.
  10
  11 Signed-off-by: Harald Geyer <harald@ccbib.org>
  12 Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
  13 ---
  14  Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt | 6 ++++--
  15  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi            | 7 +++++++
  16  2 files changed, 11 insertions(+), 2 deletions(-)
  17
  18 --- a/Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt
  19 +++ b/Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt
  20 @@ -2,8 +2,10 @@ Allwinner SoCs Watchdog timer
  21
  22  Required properties:
  23
  24 -- compatible : should be either "allwinner,sun4i-a10-wdt" or
  25 -               "allwinner,sun6i-a31-wdt"
  26 +- compatible : should be one of
  27 +       "allwinner,sun4i-a10-wdt"
  28 +       "allwinner,sun6i-a31-wdt"
  29 +       "allwinner,sun50i-a64-wdt","allwinner,sun6i-a31-wdt"
  30  - reg : Specifies base physical address and size of the registers.
  31
  32  Example:
  33 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
  34 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
  35 @@ -537,5 +537,12 @@
  36                         #address-cells = <1>;
  37                         #size-cells = <0>;
  38                 };
  39 +
  40 +               wdt0: watchdog@1c20ca0 {
  41 +                       compatible = "allwinner,sun50i-a64-wdt",
  42 +                                    "allwinner,sun6i-a31-wdt";
  43 +                       reg = <0x01c20ca0 0x20>;
  44 +                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
  45 +               };
  46         };
  47  };