toolchain/gcc/patches/8.3.0/110-Fix-MIPS-PR-84790.patch

   1 Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
   2 MIPS16 functions have a static assembler prologue which clobbers
   3 registers v0 and v1. Add these register clobbers to function call
   4 instructions.
   5
   6 --- a/gcc/config/mips/mips.c
   7 +++ b/gcc/config/mips/mips.c
   8 @@ -3102,6 +3102,12 @@ mips_emit_call_insn (rtx pattern, rtx or
   9        emit_insn (gen_update_got_version ());
  10      }
  11
  12 +  if (TARGET_MIPS16 && TARGET_USE_GOT)
  13 +    {
  14 +      clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
  15 +      clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
  16 +    }
  17 +
  18    if (TARGET_MIPS16
  19        && TARGET_EXPLICIT_RELOCS
  20        && TARGET_CALL_CLOBBERED_GP)