add arm fix for gdb from #1468
[openwrt/staging/chunkeey.git] / toolchain / gdb / patches / 900-fix-arm-build.patch
1 Fixes "invalid lvalue in assignment" errors when building with gcc 4
2 http://sourceware.org/ml/crossgcc/2005-11/msg00172.html
3
4 --- gdb-6.3/sim/arm/iwmmxt.c 2003-03-27 18:13:33.000000000 +0100
5 +++ gdb-6.3.50.20051117/sim/arm/iwmmxt.c 2005-05-12 09:36:59.000000000 +0200
6 @@ -14,7 +14,7 @@
7
8 You should have received a copy of the GNU General Public License
9 along with this program; if not, write to the Free Software
10 - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
11 + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
12
13 #include "armdefs.h"
14 #include "armos.h"
15 @@ -2114,7 +2114,7 @@ WMAC (ARMword instr)
16
17 s = (signed long) a * (signed long) b;
18
19 - (signed long long) t += s;
20 + t = t + (ARMdword) s;
21 }
22 else
23 {
24 @@ -2130,7 +2130,7 @@ WMAC (ARMword instr)
25 wR [BITS (12, 15)] = 0;
26
27 if (BIT (21)) /* Signed. */
28 - (signed long long) wR[BITS (12, 15)] += (signed long long) t;
29 + wR[BITS (12, 15)] += t;
30 else
31 wR [BITS (12, 15)] += t;
32
33 @@ -2166,7 +2166,7 @@ WMADD (ARMword instr)
34 b = wRHALF (BITS (0, 3), i * 2);
35 b = EXTEND16 (b);
36
37 - (signed long) s1 = a * b;
38 + s1 = (ARMdword) (a * b);
39
40 a = wRHALF (BITS (16, 19), i * 2 + 1);
41 a = EXTEND16 (a);
42 @@ -2174,7 +2174,7 @@ WMADD (ARMword instr)
43 b = wRHALF (BITS (0, 3), i * 2 + 1);
44 b = EXTEND16 (b);
45
46 - (signed long) s2 = a * b;
47 + s2 = (ARMdword) (a * b);
48 }
49 else /* Unsigned. */
50 {
51 @@ -2183,12 +2183,12 @@ WMADD (ARMword instr)
52 a = wRHALF (BITS (16, 19), i * 2);
53 b = wRHALF (BITS ( 0, 3), i * 2);
54
55 - (unsigned long) s1 = a * b;
56 + s1 = (ARMdword) (a * b);
57
58 a = wRHALF (BITS (16, 19), i * 2 + 1);
59 b = wRHALF (BITS ( 0, 3), i * 2 + 1);
60
61 - (signed long) s2 = a * b;
62 + s2 = (ARMdword) a * b;
63 }
64
65 r |= (ARMdword) ((s1 + s2) & 0xffffffff) << (i ? 32 : 0);
66 @@ -2837,7 +2837,7 @@ WSLL (ARMul_State * state, ARMword instr
67 if (shift > 63)
68 r = 0;
69 else
70 - r = ((wR[BITS (16, 19)] & 0xffffffffffffffff) << shift);
71 + r = ((wR[BITS (16, 19)] & 0xffffffffffffffffULL) << shift);
72
73 SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
74 SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
75 @@ -2914,9 +2914,9 @@ WSRA (ARMul_State * state, ARMword instr
76
77 case Dqual:
78 if (shift > 63)
79 - r = (wR [BITS (16, 19)] & 0x8000000000000000) ? 0xffffffffffffffff : 0;
80 + r = (wR [BITS (16, 19)] & 0x8000000000000000ULL) ? 0xffffffffffffffffULL : 0;
81 else
82 - r = ((signed long long) (wR[BITS (16, 19)] & 0xffffffffffffffff) >> shift);
83 + r = ((signed long long) (wR[BITS (16, 19)] & 0xffffffffffffffffULL) >> shift);
84 SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
85 SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
86 break;
87 @@ -2985,7 +2985,7 @@ WSRL (ARMul_State * state, ARMword instr
88 if (shift > 63)
89 r = 0;
90 else
91 - r = (wR [BITS (16, 19)] & 0xffffffffffffffff) >> shift;
92 + r = (wR [BITS (16, 19)] & 0xffffffffffffffffULL) >> shift;
93
94 SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
95 SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
96 @@ -3287,7 +3287,7 @@ WUNPCKEH (ARMul_State * state, ARMword i
97 r = wRWORD (BITS (16, 19), 1);
98
99 if (BIT (21) && NBIT32 (r))
100 - r |= 0xffffffff00000000;
101 + r |= 0xffffffff00000000ULL;
102
103 SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
104 SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
105 @@ -3354,7 +3354,7 @@ WUNPCKEL (ARMul_State * state, ARMword i
106 r = wRWORD (BITS (16, 19), 0);
107
108 if (BIT (21) && NBIT32 (r))
109 - r |= 0xffffffff00000000;
110 + r |= 0xffffffff00000000ULL;
111
112 SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
113 SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);