musl: update to 1.1.12 + git from 2016-01-22
[openwrt/staging/chunkeey.git] / toolchain / musl / patches / 000-update-to-git-2016-01-22.patch
1 --- a/.gitignore
2 +++ b/.gitignore
3 @@ -5,9 +5,6 @@
4 *.so.1
5 arch/*/bits/alltypes.h
6 config.mak
7 -include/bits
8 -tools/musl-gcc
9 -tools/musl-clang
10 -tools/ld.musl-clang
11 lib/musl-gcc.specs
12 src/internal/version.h
13 +/obj/
14 --- a/Makefile
15 +++ b/Makefile
16 @@ -8,6 +8,7 @@
17 # Do not make changes here.
18 #
19
20 +srcdir = .
21 exec_prefix = /usr/local
22 bindir = $(exec_prefix)/bin
23
24 @@ -16,31 +17,38 @@ includedir = $(prefix)/include
25 libdir = $(prefix)/lib
26 syslibdir = /lib
27
28 -SRCS = $(sort $(wildcard src/*/*.c arch/$(ARCH)/src/*.c))
29 -OBJS = $(SRCS:.c=.o)
30 +BASE_SRCS = $(sort $(wildcard $(srcdir)/src/*/*.c $(srcdir)/arch/$(ARCH)/src/*.[csS]))
31 +BASE_OBJS = $(patsubst $(srcdir)/%,%.o,$(basename $(BASE_SRCS)))
32 +ARCH_SRCS = $(wildcard $(srcdir)/src/*/$(ARCH)/*.[csS])
33 +ARCH_OBJS = $(patsubst $(srcdir)/%,%.o,$(basename $(ARCH_SRCS)))
34 +REPLACED_OBJS = $(sort $(subst /$(ARCH)/,/,$(ARCH_OBJS)))
35 +OBJS = $(addprefix obj/, $(filter-out $(REPLACED_OBJS), $(sort $(BASE_OBJS) $(ARCH_OBJS))))
36 LOBJS = $(OBJS:.o=.lo)
37 -GENH = include/bits/alltypes.h
38 -GENH_INT = src/internal/version.h
39 -IMPH = src/internal/stdio_impl.h src/internal/pthread_impl.h src/internal/libc.h
40 +GENH = obj/include/bits/alltypes.h
41 +GENH_INT = obj/src/internal/version.h
42 +IMPH = $(addprefix $(srcdir)/, src/internal/stdio_impl.h src/internal/pthread_impl.h src/internal/libc.h)
43
44 -LDFLAGS =
45 +LDFLAGS =
46 +LDFLAGS_AUTO =
47 LIBCC = -lgcc
48 CPPFLAGS =
49 -CFLAGS = -Os -pipe
50 +CFLAGS =
51 +CFLAGS_AUTO = -Os -pipe
52 CFLAGS_C99FSE = -std=c99 -ffreestanding -nostdinc
53
54 CFLAGS_ALL = $(CFLAGS_C99FSE)
55 -CFLAGS_ALL += -D_XOPEN_SOURCE=700 -I./arch/$(ARCH) -I./src/internal -I./include
56 -CFLAGS_ALL += $(CPPFLAGS) $(CFLAGS)
57 -CFLAGS_ALL_STATIC = $(CFLAGS_ALL)
58 -CFLAGS_ALL_SHARED = $(CFLAGS_ALL) -fPIC -DSHARED
59 +CFLAGS_ALL += -D_XOPEN_SOURCE=700 -I$(srcdir)/arch/$(ARCH) -Iobj/src/internal -I$(srcdir)/src/internal -Iobj/include -I$(srcdir)/include
60 +CFLAGS_ALL += $(CPPFLAGS) $(CFLAGS_AUTO) $(CFLAGS)
61 +
62 +LDFLAGS_ALL = $(LDFLAGS_AUTO) $(LDFLAGS)
63
64 AR = $(CROSS_COMPILE)ar
65 RANLIB = $(CROSS_COMPILE)ranlib
66 -INSTALL = ./tools/install.sh
67 +INSTALL = $(srcdir)/tools/install.sh
68
69 -ARCH_INCLUDES = $(wildcard arch/$(ARCH)/bits/*.h)
70 -ALL_INCLUDES = $(sort $(wildcard include/*.h include/*/*.h) $(GENH) $(ARCH_INCLUDES:arch/$(ARCH)/%=include/%))
71 +ARCH_INCLUDES = $(wildcard $(srcdir)/arch/$(ARCH)/bits/*.h)
72 +INCLUDES = $(wildcard $(srcdir)/include/*.h $(srcdir)/include/*/*.h)
73 +ALL_INCLUDES = $(sort $(INCLUDES:$(srcdir)/%=%) $(GENH:obj/%=%) $(ARCH_INCLUDES:$(srcdir)/arch/$(ARCH)/%=include/%))
74
75 EMPTY_LIB_NAMES = m rt pthread crypt util xnet resolv dl
76 EMPTY_LIBS = $(EMPTY_LIB_NAMES:%=lib/lib%.a)
77 @@ -49,7 +57,7 @@ STATIC_LIBS = lib/libc.a
78 SHARED_LIBS = lib/libc.so
79 TOOL_LIBS = lib/musl-gcc.specs
80 ALL_LIBS = $(CRT_LIBS) $(STATIC_LIBS) $(SHARED_LIBS) $(EMPTY_LIBS) $(TOOL_LIBS)
81 -ALL_TOOLS = tools/musl-gcc
82 +ALL_TOOLS = obj/musl-gcc
83
84 WRAPCC_GCC = gcc
85 WRAPCC_CLANG = clang
86 @@ -58,95 +66,93 @@ LDSO_PATHNAME = $(syslibdir)/ld-musl-$(A
87
88 -include config.mak
89
90 +ifeq ($(ARCH),)
91 +$(error Please set ARCH in config.mak before running make.)
92 +endif
93 +
94 all: $(ALL_LIBS) $(ALL_TOOLS)
95
96 +OBJ_DIRS = $(sort $(patsubst %/,%,$(dir $(ALL_LIBS) $(ALL_TOOLS) $(OBJS) $(GENH) $(GENH_INT))) $(addprefix obj/, crt crt/$(ARCH) include))
97 +
98 +$(ALL_LIBS) $(ALL_TOOLS) $(CRT_LIBS:lib/%=obj/crt/%) $(OBJS) $(LOBJS) $(GENH) $(GENH_INT): | $(OBJ_DIRS)
99 +
100 +$(OBJ_DIRS):
101 + mkdir -p $@
102 +
103 install: install-libs install-headers install-tools
104
105 clean:
106 - rm -f crt/*.o
107 - rm -f $(OBJS)
108 - rm -f $(LOBJS)
109 - rm -f $(ALL_LIBS) lib/*.[ao] lib/*.so
110 - rm -f $(ALL_TOOLS)
111 - rm -f $(GENH) $(GENH_INT)
112 - rm -f include/bits
113 + rm -rf obj lib
114
115 distclean: clean
116 rm -f config.mak
117
118 -include/bits:
119 - @test "$(ARCH)" || { echo "Please set ARCH in config.mak before running make." ; exit 1 ; }
120 - ln -sf ../arch/$(ARCH)/bits $@
121 +obj/include/bits/alltypes.h: $(srcdir)/arch/$(ARCH)/bits/alltypes.h.in $(srcdir)/include/alltypes.h.in $(srcdir)/tools/mkalltypes.sed
122 + sed -f $(srcdir)/tools/mkalltypes.sed $(srcdir)/arch/$(ARCH)/bits/alltypes.h.in $(srcdir)/include/alltypes.h.in > $@
123
124 -include/bits/alltypes.h.in: include/bits
125 +obj/src/internal/version.h: $(wildcard $(srcdir)/VERSION $(srcdir)/.git)
126 + printf '#define VERSION "%s"\n' "$$(cd $(srcdir); sh tools/version.sh)" > $@
127
128 -include/bits/alltypes.h: include/bits/alltypes.h.in include/alltypes.h.in tools/mkalltypes.sed
129 - sed -f tools/mkalltypes.sed include/bits/alltypes.h.in include/alltypes.h.in > $@
130 +obj/src/internal/version.o obj/src/internal/version.lo: obj/src/internal/version.h
131
132 -src/internal/version.h: $(wildcard VERSION .git)
133 - printf '#define VERSION "%s"\n' "$$(sh tools/version.sh)" > $@
134 +obj/crt/rcrt1.o obj/src/ldso/dlstart.lo obj/src/ldso/dynlink.lo: $(srcdir)/src/internal/dynlink.h $(srcdir)/arch/$(ARCH)/reloc.h
135
136 -src/internal/version.lo: src/internal/version.h
137 +obj/crt/crt1.o obj/crt/scrt1.o obj/crt/rcrt1.o obj/src/ldso/dlstart.lo: $(srcdir)/arch/$(ARCH)/crt_arch.h
138
139 -crt/rcrt1.o src/ldso/dlstart.lo src/ldso/dynlink.lo: src/internal/dynlink.h arch/$(ARCH)/reloc.h
140 +obj/crt/rcrt1.o: $(srcdir)/src/ldso/dlstart.c
141
142 -crt/crt1.o crt/Scrt1.o crt/rcrt1.o src/ldso/dlstart.lo: $(wildcard arch/$(ARCH)/crt_arch.h)
143 +obj/crt/Scrt1.o obj/crt/rcrt1.o: CFLAGS_ALL += -fPIC
144
145 -crt/rcrt1.o: src/ldso/dlstart.c
146 +obj/crt/$(ARCH)/crti.o: $(srcdir)/crt/$(ARCH)/crti.s
147
148 -crt/Scrt1.o crt/rcrt1.o: CFLAGS += -fPIC
149 +obj/crt/$(ARCH)/crtn.o: $(srcdir)/crt/$(ARCH)/crtn.s
150
151 -OPTIMIZE_SRCS = $(wildcard $(OPTIMIZE_GLOBS:%=src/%))
152 -$(OPTIMIZE_SRCS:%.c=%.o) $(OPTIMIZE_SRCS:%.c=%.lo): CFLAGS += -O3
153 +OPTIMIZE_SRCS = $(wildcard $(OPTIMIZE_GLOBS:%=$(srcdir)/src/%))
154 +$(OPTIMIZE_SRCS:$(srcdir)/%.c=obj/%.o) $(OPTIMIZE_SRCS:$(srcdir)/%.c=obj/%.lo): CFLAGS += -O3
155
156 MEMOPS_SRCS = src/string/memcpy.c src/string/memmove.c src/string/memcmp.c src/string/memset.c
157 -$(MEMOPS_SRCS:%.c=%.o) $(MEMOPS_SRCS:%.c=%.lo): CFLAGS += $(CFLAGS_MEMOPS)
158 +$(MEMOPS_SRCS:%.c=obj/%.o) $(MEMOPS_SRCS:%.c=obj/%.lo): CFLAGS_ALL += $(CFLAGS_MEMOPS)
159
160 NOSSP_SRCS = $(wildcard crt/*.c) \
161 src/env/__libc_start_main.c src/env/__init_tls.c \
162 src/thread/__set_thread_area.c src/env/__stack_chk_fail.c \
163 src/string/memset.c src/string/memcpy.c \
164 src/ldso/dlstart.c src/ldso/dynlink.c
165 -$(NOSSP_SRCS:%.c=%.o) $(NOSSP_SRCS:%.c=%.lo): CFLAGS += $(CFLAGS_NOSSP)
166 +$(NOSSP_SRCS:%.c=obj/%.o) $(NOSSP_SRCS:%.c=obj/%.lo): CFLAGS_ALL += $(CFLAGS_NOSSP)
167 +
168 +$(CRT_LIBS:lib/%=obj/crt/%): CFLAGS_ALL += -DCRT
169
170 -$(CRT_LIBS:lib/%=crt/%): CFLAGS += -DCRT
171 +$(LOBJS): CFLAGS_ALL += -fPIC -DSHARED
172
173 -# This incantation ensures that changes to any subarch asm files will
174 -# force the corresponding object file to be rebuilt, even if the implicit
175 -# rule below goes indirectly through a .sub file.
176 -define mkasmdep
177 -$(dir $(patsubst %/,%,$(dir $(1))))$(notdir $(1:.s=.o)): $(1)
178 -endef
179 -$(foreach s,$(wildcard src/*/$(ARCH)*/*.s),$(eval $(call mkasmdep,$(s))))
180 +CC_CMD = $(CC) $(CFLAGS_ALL) -c -o $@ $<
181
182 # Choose invocation of assembler to be used
183 -# $(1) is input file, $(2) is output file, $(3) is assembler flags
184 ifeq ($(ADD_CFI),yes)
185 - AS_CMD = LC_ALL=C awk -f tools/add-cfi.common.awk -f tools/add-cfi.$(ARCH).awk $< | $(CC) -x assembler -c -o $@ -
186 + AS_CMD = LC_ALL=C awk -f $(srcdir)/tools/add-cfi.common.awk -f $(srcdir)/tools/add-cfi.$(ARCH).awk $< | $(CC) $(CFLAGS_ALL) -x assembler -c -o $@ -
187 else
188 - AS_CMD = $(CC) -c -o $@ $<
189 + AS_CMD = $(CC_CMD)
190 endif
191
192 -%.o: $(ARCH)$(ASMSUBARCH)/%.sub
193 - $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $(dir $<)$(shell cat $<)
194 +obj/%.o: $(srcdir)/%.s
195 + $(AS_CMD)
196
197 -%.o: $(ARCH)/%.s
198 - $(AS_CMD) $(CFLAGS_ALL_STATIC)
199 +obj/%.o: $(srcdir)/%.S
200 + $(CC_CMD)
201
202 -%.o: %.c $(GENH) $(IMPH)
203 - $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $<
204 +obj/%.o: $(srcdir)/%.c $(GENH) $(IMPH)
205 + $(CC_CMD)
206
207 -%.lo: $(ARCH)$(ASMSUBARCH)/%.sub
208 - $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $(dir $<)$(shell cat $<)
209 +obj/%.lo: $(srcdir)/%.s
210 + $(AS_CMD)
211
212 -%.lo: $(ARCH)/%.s
213 - $(AS_CMD) $(CFLAGS_ALL_SHARED)
214 +obj/%.lo: $(srcdir)/%.S
215 + $(CC_CMD)
216
217 -%.lo: %.c $(GENH) $(IMPH)
218 - $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $<
219 +obj/%.lo: $(srcdir)/%.c $(GENH) $(IMPH)
220 + $(CC_CMD)
221
222 lib/libc.so: $(LOBJS)
223 - $(CC) $(CFLAGS_ALL_SHARED) $(LDFLAGS) -nostdlib -shared \
224 + $(CC) $(CFLAGS_ALL) $(LDFLAGS_ALL) -nostdlib -shared \
225 -Wl,-e,_dlstart -Wl,-Bsymbolic-functions \
226 -o $@ $(LOBJS) $(LIBCC)
227
228 @@ -159,21 +165,27 @@ $(EMPTY_LIBS):
229 rm -f $@
230 $(AR) rc $@
231
232 -lib/%.o: crt/%.o
233 +lib/%.o: obj/crt/%.o
234 cp $< $@
235
236 -lib/musl-gcc.specs: tools/musl-gcc.specs.sh config.mak
237 +lib/crti.o: obj/crt/$(ARCH)/crti.o
238 + cp $< $@
239 +
240 +lib/crtn.o: obj/crt/$(ARCH)/crtn.o
241 + cp $< $@
242 +
243 +lib/musl-gcc.specs: $(srcdir)/tools/musl-gcc.specs.sh config.mak
244 sh $< "$(includedir)" "$(libdir)" "$(LDSO_PATHNAME)" > $@
245
246 -tools/musl-gcc: config.mak
247 +obj/musl-gcc: config.mak
248 printf '#!/bin/sh\nexec "$${REALGCC:-$(WRAPCC_GCC)}" "$$@" -specs "%s/musl-gcc.specs"\n' "$(libdir)" > $@
249 chmod +x $@
250
251 -tools/%-clang: tools/%-clang.in config.mak
252 +obj/%-clang: $(srcdir)/tools/%-clang.in config.mak
253 sed -e 's!@CC@!$(WRAPCC_CLANG)!g' -e 's!@PREFIX@!$(prefix)!g' -e 's!@INCDIR@!$(includedir)!g' -e 's!@LIBDIR@!$(libdir)!g' -e 's!@LDSO@!$(LDSO_PATHNAME)!g' $< > $@
254 chmod +x $@
255
256 -$(DESTDIR)$(bindir)/%: tools/%
257 +$(DESTDIR)$(bindir)/%: obj/%
258 $(INSTALL) -D $< $@
259
260 $(DESTDIR)$(libdir)/%.so: lib/%.so
261 @@ -182,10 +194,13 @@ $(DESTDIR)$(libdir)/%.so: lib/%.so
262 $(DESTDIR)$(libdir)/%: lib/%
263 $(INSTALL) -D -m 644 $< $@
264
265 -$(DESTDIR)$(includedir)/bits/%: arch/$(ARCH)/bits/%
266 +$(DESTDIR)$(includedir)/bits/%: $(srcdir)/arch/$(ARCH)/bits/%
267 + $(INSTALL) -D -m 644 $< $@
268 +
269 +$(DESTDIR)$(includedir)/bits/%: obj/include/bits/%
270 $(INSTALL) -D -m 644 $< $@
271
272 -$(DESTDIR)$(includedir)/%: include/%
273 +$(DESTDIR)$(includedir)/%: $(srcdir)/include/%
274 $(INSTALL) -D -m 644 $< $@
275
276 $(DESTDIR)$(LDSO_PATHNAME): $(DESTDIR)$(libdir)/libc.so
277 @@ -195,12 +210,12 @@ install-libs: $(ALL_LIBS:lib/%=$(DESTDIR
278
279 install-headers: $(ALL_INCLUDES:include/%=$(DESTDIR)$(includedir)/%)
280
281 -install-tools: $(ALL_TOOLS:tools/%=$(DESTDIR)$(bindir)/%)
282 +install-tools: $(ALL_TOOLS:obj/%=$(DESTDIR)$(bindir)/%)
283
284 musl-git-%.tar.gz: .git
285 - git archive --format=tar.gz --prefix=$(patsubst %.tar.gz,%,$@)/ -o $@ $(patsubst musl-git-%.tar.gz,%,$@)
286 + git --git-dir=$(srcdir)/.git archive --format=tar.gz --prefix=$(patsubst %.tar.gz,%,$@)/ -o $@ $(patsubst musl-git-%.tar.gz,%,$@)
287
288 musl-%.tar.gz: .git
289 - git archive --format=tar.gz --prefix=$(patsubst %.tar.gz,%,$@)/ -o $@ v$(patsubst musl-%.tar.gz,%,$@)
290 + git --git-dir=$(srcdir)/.git archive --format=tar.gz --prefix=$(patsubst %.tar.gz,%,$@)/ -o $@ v$(patsubst musl-%.tar.gz,%,$@)
291
292 .PHONY: all clean install install-libs install-headers install-tools
293 --- a/arch/aarch64/atomic.h
294 +++ /dev/null
295 @@ -1,206 +0,0 @@
296 -#ifndef _INTERNAL_ATOMIC_H
297 -#define _INTERNAL_ATOMIC_H
298 -
299 -#include <stdint.h>
300 -
301 -static inline int a_ctz_64(uint64_t x)
302 -{
303 - __asm__(
304 - " rbit %0, %1\n"
305 - " clz %0, %0\n"
306 - : "=r"(x) : "r"(x));
307 - return x;
308 -}
309 -
310 -static inline int a_ctz_l(unsigned long x)
311 -{
312 - return a_ctz_64(x);
313 -}
314 -
315 -static inline void a_barrier()
316 -{
317 - __asm__ __volatile__("dmb ish");
318 -}
319 -
320 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
321 -{
322 - void *old;
323 - __asm__ __volatile__(
324 - " dmb ish\n"
325 - "1: ldxr %0,%3\n"
326 - " cmp %0,%1\n"
327 - " b.ne 1f\n"
328 - " stxr %w0,%2,%3\n"
329 - " cbnz %w0,1b\n"
330 - " mov %0,%1\n"
331 - "1: dmb ish\n"
332 - : "=&r"(old)
333 - : "r"(t), "r"(s), "Q"(*(long*)p)
334 - : "memory", "cc");
335 - return old;
336 -}
337 -
338 -static inline int a_cas(volatile int *p, int t, int s)
339 -{
340 - int old;
341 - __asm__ __volatile__(
342 - " dmb ish\n"
343 - "1: ldxr %w0,%3\n"
344 - " cmp %w0,%w1\n"
345 - " b.ne 1f\n"
346 - " stxr %w0,%w2,%3\n"
347 - " cbnz %w0,1b\n"
348 - " mov %w0,%w1\n"
349 - "1: dmb ish\n"
350 - : "=&r"(old)
351 - : "r"(t), "r"(s), "Q"(*p)
352 - : "memory", "cc");
353 - return old;
354 -}
355 -
356 -static inline int a_swap(volatile int *x, int v)
357 -{
358 - int old, tmp;
359 - __asm__ __volatile__(
360 - " dmb ish\n"
361 - "1: ldxr %w0,%3\n"
362 - " stxr %w1,%w2,%3\n"
363 - " cbnz %w1,1b\n"
364 - " dmb ish\n"
365 - : "=&r"(old), "=&r"(tmp)
366 - : "r"(v), "Q"(*x)
367 - : "memory", "cc" );
368 - return old;
369 -}
370 -
371 -static inline int a_fetch_add(volatile int *x, int v)
372 -{
373 - int old, tmp;
374 - __asm__ __volatile__(
375 - " dmb ish\n"
376 - "1: ldxr %w0,%3\n"
377 - " add %w0,%w0,%w2\n"
378 - " stxr %w1,%w0,%3\n"
379 - " cbnz %w1,1b\n"
380 - " dmb ish\n"
381 - : "=&r"(old), "=&r"(tmp)
382 - : "r"(v), "Q"(*x)
383 - : "memory", "cc" );
384 - return old-v;
385 -}
386 -
387 -static inline void a_inc(volatile int *x)
388 -{
389 - int tmp, tmp2;
390 - __asm__ __volatile__(
391 - " dmb ish\n"
392 - "1: ldxr %w0,%2\n"
393 - " add %w0,%w0,#1\n"
394 - " stxr %w1,%w0,%2\n"
395 - " cbnz %w1,1b\n"
396 - " dmb ish\n"
397 - : "=&r"(tmp), "=&r"(tmp2)
398 - : "Q"(*x)
399 - : "memory", "cc" );
400 -}
401 -
402 -static inline void a_dec(volatile int *x)
403 -{
404 - int tmp, tmp2;
405 - __asm__ __volatile__(
406 - " dmb ish\n"
407 - "1: ldxr %w0,%2\n"
408 - " sub %w0,%w0,#1\n"
409 - " stxr %w1,%w0,%2\n"
410 - " cbnz %w1,1b\n"
411 - " dmb ish\n"
412 - : "=&r"(tmp), "=&r"(tmp2)
413 - : "Q"(*x)
414 - : "memory", "cc" );
415 -}
416 -
417 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
418 -{
419 - int tmp, tmp2;
420 - __asm__ __volatile__(
421 - " dmb ish\n"
422 - "1: ldxr %0,%3\n"
423 - " and %0,%0,%2\n"
424 - " stxr %w1,%0,%3\n"
425 - " cbnz %w1,1b\n"
426 - " dmb ish\n"
427 - : "=&r"(tmp), "=&r"(tmp2)
428 - : "r"(v), "Q"(*p)
429 - : "memory", "cc" );
430 -}
431 -
432 -static inline void a_and(volatile int *p, int v)
433 -{
434 - int tmp, tmp2;
435 - __asm__ __volatile__(
436 - " dmb ish\n"
437 - "1: ldxr %w0,%3\n"
438 - " and %w0,%w0,%w2\n"
439 - " stxr %w1,%w0,%3\n"
440 - " cbnz %w1,1b\n"
441 - " dmb ish\n"
442 - : "=&r"(tmp), "=&r"(tmp2)
443 - : "r"(v), "Q"(*p)
444 - : "memory", "cc" );
445 -}
446 -
447 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
448 -{
449 - int tmp, tmp2;
450 - __asm__ __volatile__(
451 - " dmb ish\n"
452 - "1: ldxr %0,%3\n"
453 - " orr %0,%0,%2\n"
454 - " stxr %w1,%0,%3\n"
455 - " cbnz %w1,1b\n"
456 - " dmb ish\n"
457 - : "=&r"(tmp), "=&r"(tmp2)
458 - : "r"(v), "Q"(*p)
459 - : "memory", "cc" );
460 -}
461 -
462 -static inline void a_or_l(volatile void *p, long v)
463 -{
464 - return a_or_64(p, v);
465 -}
466 -
467 -static inline void a_or(volatile int *p, int v)
468 -{
469 - int tmp, tmp2;
470 - __asm__ __volatile__(
471 - " dmb ish\n"
472 - "1: ldxr %w0,%3\n"
473 - " orr %w0,%w0,%w2\n"
474 - " stxr %w1,%w0,%3\n"
475 - " cbnz %w1,1b\n"
476 - " dmb ish\n"
477 - : "=&r"(tmp), "=&r"(tmp2)
478 - : "r"(v), "Q"(*p)
479 - : "memory", "cc" );
480 -}
481 -
482 -static inline void a_store(volatile int *p, int x)
483 -{
484 - __asm__ __volatile__(
485 - " dmb ish\n"
486 - " str %w1,%0\n"
487 - " dmb ish\n"
488 - : "=m"(*p)
489 - : "r"(x)
490 - : "memory", "cc" );
491 -}
492 -
493 -#define a_spin a_barrier
494 -
495 -static inline void a_crash()
496 -{
497 - *(volatile char *)0=0;
498 -}
499 -
500 -
501 -#endif
502 --- /dev/null
503 +++ b/arch/aarch64/atomic_arch.h
504 @@ -0,0 +1,53 @@
505 +#define a_ll a_ll
506 +static inline int a_ll(volatile int *p)
507 +{
508 + int v;
509 + __asm__ __volatile__ ("ldxr %0, %1" : "=r"(v) : "Q"(*p));
510 + return v;
511 +}
512 +
513 +#define a_sc a_sc
514 +static inline int a_sc(volatile int *p, int v)
515 +{
516 + int r;
517 + __asm__ __volatile__ ("stxr %w0,%1,%2" : "=&r"(r) : "r"(v), "Q"(*p) : "memory");
518 + return !r;
519 +}
520 +
521 +#define a_barrier a_barrier
522 +static inline void a_barrier()
523 +{
524 + __asm__ __volatile__ ("dmb ish" : : : "memory");
525 +}
526 +
527 +#define a_pre_llsc a_barrier
528 +#define a_post_llsc a_barrier
529 +
530 +#define a_cas_p a_cas_p
531 +static inline void *a_cas_p(volatile void *p, void *t, void *s)
532 +{
533 + void *old;
534 + __asm__ __volatile__(
535 + " dmb ish\n"
536 + "1: ldxr %0,%3\n"
537 + " cmp %0,%1\n"
538 + " b.ne 1f\n"
539 + " stxr %w0,%2,%3\n"
540 + " cbnz %w0,1b\n"
541 + " mov %0,%1\n"
542 + "1: dmb ish\n"
543 + : "=&r"(old)
544 + : "r"(t), "r"(s), "Q"(*(void *volatile *)p)
545 + : "memory", "cc");
546 + return old;
547 +}
548 +
549 +#define a_ctz_64 a_ctz_64
550 +static inline int a_ctz_64(uint64_t x)
551 +{
552 + __asm__(
553 + " rbit %0, %1\n"
554 + " clz %0, %0\n"
555 + : "=r"(x) : "r"(x));
556 + return x;
557 +}
558 --- a/arch/aarch64/pthread_arch.h
559 +++ b/arch/aarch64/pthread_arch.h
560 @@ -8,4 +8,4 @@ static inline struct pthread *__pthread_
561 #define TLS_ABOVE_TP
562 #define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread) - 16)
563
564 -#define CANCEL_REG_IP 33
565 +#define MC_PC pc
566 --- a/arch/arm/atomic.h
567 +++ /dev/null
568 @@ -1,261 +0,0 @@
569 -#ifndef _INTERNAL_ATOMIC_H
570 -#define _INTERNAL_ATOMIC_H
571 -
572 -#include <stdint.h>
573 -
574 -static inline int a_ctz_l(unsigned long x)
575 -{
576 - static const char debruijn32[32] = {
577 - 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
578 - 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
579 - };
580 - return debruijn32[(x&-x)*0x076be629 >> 27];
581 -}
582 -
583 -static inline int a_ctz_64(uint64_t x)
584 -{
585 - uint32_t y = x;
586 - if (!y) {
587 - y = x>>32;
588 - return 32 + a_ctz_l(y);
589 - }
590 - return a_ctz_l(y);
591 -}
592 -
593 -#if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
594 -
595 -static inline void a_barrier()
596 -{
597 - __asm__ __volatile__("dmb ish");
598 -}
599 -
600 -static inline int a_cas(volatile int *p, int t, int s)
601 -{
602 - int old;
603 - __asm__ __volatile__(
604 - " dmb ish\n"
605 - "1: ldrex %0,%3\n"
606 - " cmp %0,%1\n"
607 - " bne 1f\n"
608 - " strex %0,%2,%3\n"
609 - " cmp %0, #0\n"
610 - " bne 1b\n"
611 - " mov %0, %1\n"
612 - "1: dmb ish\n"
613 - : "=&r"(old)
614 - : "r"(t), "r"(s), "Q"(*p)
615 - : "memory", "cc" );
616 - return old;
617 -}
618 -
619 -static inline int a_swap(volatile int *x, int v)
620 -{
621 - int old, tmp;
622 - __asm__ __volatile__(
623 - " dmb ish\n"
624 - "1: ldrex %0,%3\n"
625 - " strex %1,%2,%3\n"
626 - " cmp %1, #0\n"
627 - " bne 1b\n"
628 - " dmb ish\n"
629 - : "=&r"(old), "=&r"(tmp)
630 - : "r"(v), "Q"(*x)
631 - : "memory", "cc" );
632 - return old;
633 -}
634 -
635 -static inline int a_fetch_add(volatile int *x, int v)
636 -{
637 - int old, tmp;
638 - __asm__ __volatile__(
639 - " dmb ish\n"
640 - "1: ldrex %0,%3\n"
641 - " add %0,%0,%2\n"
642 - " strex %1,%0,%3\n"
643 - " cmp %1, #0\n"
644 - " bne 1b\n"
645 - " dmb ish\n"
646 - : "=&r"(old), "=&r"(tmp)
647 - : "r"(v), "Q"(*x)
648 - : "memory", "cc" );
649 - return old-v;
650 -}
651 -
652 -static inline void a_inc(volatile int *x)
653 -{
654 - int tmp, tmp2;
655 - __asm__ __volatile__(
656 - " dmb ish\n"
657 - "1: ldrex %0,%2\n"
658 - " add %0,%0,#1\n"
659 - " strex %1,%0,%2\n"
660 - " cmp %1, #0\n"
661 - " bne 1b\n"
662 - " dmb ish\n"
663 - : "=&r"(tmp), "=&r"(tmp2)
664 - : "Q"(*x)
665 - : "memory", "cc" );
666 -}
667 -
668 -static inline void a_dec(volatile int *x)
669 -{
670 - int tmp, tmp2;
671 - __asm__ __volatile__(
672 - " dmb ish\n"
673 - "1: ldrex %0,%2\n"
674 - " sub %0,%0,#1\n"
675 - " strex %1,%0,%2\n"
676 - " cmp %1, #0\n"
677 - " bne 1b\n"
678 - " dmb ish\n"
679 - : "=&r"(tmp), "=&r"(tmp2)
680 - : "Q"(*x)
681 - : "memory", "cc" );
682 -}
683 -
684 -static inline void a_and(volatile int *x, int v)
685 -{
686 - int tmp, tmp2;
687 - __asm__ __volatile__(
688 - " dmb ish\n"
689 - "1: ldrex %0,%3\n"
690 - " and %0,%0,%2\n"
691 - " strex %1,%0,%3\n"
692 - " cmp %1, #0\n"
693 - " bne 1b\n"
694 - " dmb ish\n"
695 - : "=&r"(tmp), "=&r"(tmp2)
696 - : "r"(v), "Q"(*x)
697 - : "memory", "cc" );
698 -}
699 -
700 -static inline void a_or(volatile int *x, int v)
701 -{
702 - int tmp, tmp2;
703 - __asm__ __volatile__(
704 - " dmb ish\n"
705 - "1: ldrex %0,%3\n"
706 - " orr %0,%0,%2\n"
707 - " strex %1,%0,%3\n"
708 - " cmp %1, #0\n"
709 - " bne 1b\n"
710 - " dmb ish\n"
711 - : "=&r"(tmp), "=&r"(tmp2)
712 - : "r"(v), "Q"(*x)
713 - : "memory", "cc" );
714 -}
715 -
716 -static inline void a_store(volatile int *p, int x)
717 -{
718 - __asm__ __volatile__(
719 - " dmb ish\n"
720 - " str %1,%0\n"
721 - " dmb ish\n"
722 - : "=m"(*p)
723 - : "r"(x)
724 - : "memory", "cc" );
725 -}
726 -
727 -#else
728 -
729 -int __a_cas(int, int, volatile int *) __attribute__((__visibility__("hidden")));
730 -#define __k_cas __a_cas
731 -
732 -static inline void a_barrier()
733 -{
734 - __asm__ __volatile__("bl __a_barrier"
735 - : : : "memory", "cc", "ip", "lr" );
736 -}
737 -
738 -static inline int a_cas(volatile int *p, int t, int s)
739 -{
740 - int old;
741 - for (;;) {
742 - if (!__k_cas(t, s, p))
743 - return t;
744 - if ((old=*p) != t)
745 - return old;
746 - }
747 -}
748 -
749 -static inline int a_swap(volatile int *x, int v)
750 -{
751 - int old;
752 - do old = *x;
753 - while (__k_cas(old, v, x));
754 - return old;
755 -}
756 -
757 -static inline int a_fetch_add(volatile int *x, int v)
758 -{
759 - int old;
760 - do old = *x;
761 - while (__k_cas(old, old+v, x));
762 - return old;
763 -}
764 -
765 -static inline void a_inc(volatile int *x)
766 -{
767 - a_fetch_add(x, 1);
768 -}
769 -
770 -static inline void a_dec(volatile int *x)
771 -{
772 - a_fetch_add(x, -1);
773 -}
774 -
775 -static inline void a_store(volatile int *p, int x)
776 -{
777 - a_barrier();
778 - *p = x;
779 - a_barrier();
780 -}
781 -
782 -static inline void a_and(volatile int *p, int v)
783 -{
784 - int old;
785 - do old = *p;
786 - while (__k_cas(old, old&v, p));
787 -}
788 -
789 -static inline void a_or(volatile int *p, int v)
790 -{
791 - int old;
792 - do old = *p;
793 - while (__k_cas(old, old|v, p));
794 -}
795 -
796 -#endif
797 -
798 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
799 -{
800 - return (void *)a_cas(p, (int)t, (int)s);
801 -}
802 -
803 -#define a_spin a_barrier
804 -
805 -static inline void a_crash()
806 -{
807 - *(volatile char *)0=0;
808 -}
809 -
810 -static inline void a_or_l(volatile void *p, long v)
811 -{
812 - a_or(p, v);
813 -}
814 -
815 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
816 -{
817 - union { uint64_t v; uint32_t r[2]; } u = { v };
818 - a_and((int *)p, u.r[0]);
819 - a_and((int *)p+1, u.r[1]);
820 -}
821 -
822 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
823 -{
824 - union { uint64_t v; uint32_t r[2]; } u = { v };
825 - a_or((int *)p, u.r[0]);
826 - a_or((int *)p+1, u.r[1]);
827 -}
828 -
829 -#endif
830 --- /dev/null
831 +++ b/arch/arm/atomic_arch.h
832 @@ -0,0 +1,64 @@
833 +__attribute__((__visibility__("hidden")))
834 +extern const void *__arm_atomics[3]; /* gettp, cas, barrier */
835 +
836 +#if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6ZK__) && !__thumb__) \
837 + || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
838 +
839 +#define a_ll a_ll
840 +static inline int a_ll(volatile int *p)
841 +{
842 + int v;
843 + __asm__ __volatile__ ("ldrex %0, %1" : "=r"(v) : "Q"(*p));
844 + return v;
845 +}
846 +
847 +#define a_sc a_sc
848 +static inline int a_sc(volatile int *p, int v)
849 +{
850 + int r;
851 + __asm__ __volatile__ ("strex %0,%1,%2" : "=&r"(r) : "r"(v), "Q"(*p) : "memory");
852 + return !r;
853 +}
854 +
855 +#if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
856 +
857 +#define a_barrier a_barrier
858 +static inline void a_barrier()
859 +{
860 + __asm__ __volatile__ ("dmb ish" : : : "memory");
861 +}
862 +
863 +#endif
864 +
865 +#define a_pre_llsc a_barrier
866 +#define a_post_llsc a_barrier
867 +
868 +#else
869 +
870 +#define a_cas a_cas
871 +static inline int a_cas(volatile int *p, int t, int s)
872 +{
873 + for (;;) {
874 + register int r0 __asm__("r0") = t;
875 + register int r1 __asm__("r1") = s;
876 + register volatile int *r2 __asm__("r2") = p;
877 + int old;
878 + __asm__ __volatile__ (
879 + "bl __a_cas"
880 + : "+r"(r0) : "r"(r1), "r"(r2)
881 + : "memory", "r3", "lr", "ip", "cc" );
882 + if (!r0) return t;
883 + if ((old=*p)!=t) return old;
884 + }
885 +}
886 +
887 +#endif
888 +
889 +#ifndef a_barrier
890 +#define a_barrier a_barrier
891 +static inline void a_barrier()
892 +{
893 + __asm__ __volatile__("bl __a_barrier"
894 + : : : "memory", "cc", "ip", "lr" );
895 +}
896 +#endif
897 --- a/arch/arm/pthread_arch.h
898 +++ b/arch/arm/pthread_arch.h
899 @@ -27,4 +27,4 @@ static inline pthread_t __pthread_self()
900 #define TLS_ABOVE_TP
901 #define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread) - 8)
902
903 -#define CANCEL_REG_IP 18
904 +#define MC_PC arm_pc
905 --- a/arch/arm/reloc.h
906 +++ b/arch/arm/reloc.h
907 @@ -6,10 +6,10 @@
908 #define ENDIAN_SUFFIX ""
909 #endif
910
911 -#if __SOFTFP__
912 -#define FP_SUFFIX ""
913 -#else
914 +#if __ARM_PCS_VFP
915 #define FP_SUFFIX "hf"
916 +#else
917 +#define FP_SUFFIX ""
918 #endif
919
920 #define LDSO_ARCH "arm" ENDIAN_SUFFIX FP_SUFFIX
921 @@ -28,10 +28,5 @@
922 #define REL_TPOFF R_ARM_TLS_TPOFF32
923 //#define REL_TLSDESC R_ARM_TLS_DESC
924
925 -#ifdef __thumb__
926 #define CRTJMP(pc,sp) __asm__ __volatile__( \
927 "mov sp,%1 ; bx %0" : : "r"(pc), "r"(sp) : "memory" )
928 -#else
929 -#define CRTJMP(pc,sp) __asm__ __volatile__( \
930 - "mov sp,%1 ; tst %0,#1 ; moveq pc,%0 ; bx %0" : : "r"(pc), "r"(sp) : "memory" )
931 -#endif
932 --- a/arch/arm/src/__aeabi_atexit.c
933 +++ /dev/null
934 @@ -1,6 +0,0 @@
935 -int __cxa_atexit(void (*func)(void *), void *arg, void *dso);
936 -
937 -int __aeabi_atexit (void *obj, void (*func) (void *), void *d)
938 -{
939 - return __cxa_atexit (func, obj, d);
940 -}
941 --- a/arch/arm/src/__aeabi_memclr.c
942 +++ /dev/null
943 @@ -1,9 +0,0 @@
944 -#include <string.h>
945 -#include "libc.h"
946 -
947 -void __aeabi_memclr(void *dest, size_t n)
948 -{
949 - memset(dest, 0, n);
950 -}
951 -weak_alias(__aeabi_memclr, __aeabi_memclr4);
952 -weak_alias(__aeabi_memclr, __aeabi_memclr8);
953 --- a/arch/arm/src/__aeabi_memcpy.c
954 +++ /dev/null
955 @@ -1,9 +0,0 @@
956 -#include <string.h>
957 -#include "libc.h"
958 -
959 -void __aeabi_memcpy(void *restrict dest, const void *restrict src, size_t n)
960 -{
961 - memcpy(dest, src, n);
962 -}
963 -weak_alias(__aeabi_memcpy, __aeabi_memcpy4);
964 -weak_alias(__aeabi_memcpy, __aeabi_memcpy8);
965 --- a/arch/arm/src/__aeabi_memmove.c
966 +++ /dev/null
967 @@ -1,9 +0,0 @@
968 -#include <string.h>
969 -#include "libc.h"
970 -
971 -void __aeabi_memmove(void *dest, const void *src, size_t n)
972 -{
973 - memmove(dest, src, n);
974 -}
975 -weak_alias(__aeabi_memmove, __aeabi_memmove4);
976 -weak_alias(__aeabi_memmove, __aeabi_memmove8);
977 --- a/arch/arm/src/__aeabi_memset.c
978 +++ /dev/null
979 @@ -1,9 +0,0 @@
980 -#include <string.h>
981 -#include "libc.h"
982 -
983 -void __aeabi_memset(void *dest, size_t n, int c)
984 -{
985 - memset(dest, c, n);
986 -}
987 -weak_alias(__aeabi_memset, __aeabi_memset4);
988 -weak_alias(__aeabi_memset, __aeabi_memset8);
989 --- a/arch/arm/src/__set_thread_area.c
990 +++ /dev/null
991 @@ -1,49 +0,0 @@
992 -#include <stdint.h>
993 -#include <elf.h>
994 -#include "pthread_impl.h"
995 -#include "libc.h"
996 -
997 -#define HWCAP_TLS (1 << 15)
998 -
999 -extern const unsigned char __attribute__((__visibility__("hidden")))
1000 - __a_barrier_dummy[], __a_barrier_oldkuser[],
1001 - __a_barrier_v6[], __a_barrier_v7[],
1002 - __a_cas_dummy[], __a_cas_v6[], __a_cas_v7[],
1003 - __a_gettp_dummy[];
1004 -
1005 -#define __a_barrier_kuser 0xffff0fa0
1006 -#define __a_cas_kuser 0xffff0fc0
1007 -#define __a_gettp_kuser 0xffff0fe0
1008 -
1009 -extern uintptr_t __attribute__((__visibility__("hidden")))
1010 - __a_barrier_ptr, __a_cas_ptr, __a_gettp_ptr;
1011 -
1012 -#define SET(op,ver) (__a_##op##_ptr = \
1013 - (uintptr_t)__a_##op##_##ver - (uintptr_t)__a_##op##_dummy)
1014 -
1015 -int __set_thread_area(void *p)
1016 -{
1017 -#if !__ARM_ARCH_7A__ && !__ARM_ARCH_7R__ && __ARM_ARCH < 7
1018 - if (__hwcap & HWCAP_TLS) {
1019 - size_t *aux;
1020 - SET(cas, v7);
1021 - SET(barrier, v7);
1022 - for (aux=libc.auxv; *aux; aux+=2) {
1023 - if (*aux != AT_PLATFORM) continue;
1024 - const char *s = (void *)aux[1];
1025 - if (s[0]!='v' || s[1]!='6' || s[2]-'0'<10u) break;
1026 - SET(cas, v6);
1027 - SET(barrier, v6);
1028 - break;
1029 - }
1030 - } else {
1031 - int ver = *(int *)0xffff0ffc;
1032 - SET(gettp, kuser);
1033 - SET(cas, kuser);
1034 - SET(barrier, kuser);
1035 - if (ver < 2) a_crash();
1036 - if (ver < 3) SET(barrier, oldkuser);
1037 - }
1038 -#endif
1039 - return __syscall(0xf0005, p);
1040 -}
1041 --- a/arch/arm/src/arm/atomics.s
1042 +++ /dev/null
1043 @@ -1,116 +0,0 @@
1044 -.text
1045 -
1046 -.global __a_barrier
1047 -.hidden __a_barrier
1048 -.type __a_barrier,%function
1049 -__a_barrier:
1050 - ldr ip,1f
1051 - ldr ip,[pc,ip]
1052 - add pc,pc,ip
1053 -1: .word __a_barrier_ptr-1b
1054 -.global __a_barrier_dummy
1055 -.hidden __a_barrier_dummy
1056 -__a_barrier_dummy:
1057 - tst lr,#1
1058 - moveq pc,lr
1059 - bx lr
1060 -.global __a_barrier_oldkuser
1061 -.hidden __a_barrier_oldkuser
1062 -__a_barrier_oldkuser:
1063 - push {r0,r1,r2,r3,ip,lr}
1064 - mov r1,r0
1065 - mov r2,sp
1066 - ldr ip,=0xffff0fc0
1067 - mov lr,pc
1068 - mov pc,ip
1069 - pop {r0,r1,r2,r3,ip,lr}
1070 - tst lr,#1
1071 - moveq pc,lr
1072 - bx lr
1073 -.global __a_barrier_v6
1074 -.hidden __a_barrier_v6
1075 -__a_barrier_v6:
1076 - mcr p15,0,r0,c7,c10,5
1077 - bx lr
1078 -.global __a_barrier_v7
1079 -.hidden __a_barrier_v7
1080 -__a_barrier_v7:
1081 - .word 0xf57ff05b /* dmb ish */
1082 - bx lr
1083 -
1084 -.global __a_cas
1085 -.hidden __a_cas
1086 -.type __a_cas,%function
1087 -__a_cas:
1088 - ldr ip,1f
1089 - ldr ip,[pc,ip]
1090 - add pc,pc,ip
1091 -1: .word __a_cas_ptr-1b
1092 -.global __a_cas_dummy
1093 -.hidden __a_cas_dummy
1094 -__a_cas_dummy:
1095 - mov r3,r0
1096 - ldr r0,[r2]
1097 - subs r0,r3,r0
1098 - streq r1,[r2]
1099 - tst lr,#1
1100 - moveq pc,lr
1101 - bx lr
1102 -.global __a_cas_v6
1103 -.hidden __a_cas_v6
1104 -__a_cas_v6:
1105 - mov r3,r0
1106 - mcr p15,0,r0,c7,c10,5
1107 -1: .word 0xe1920f9f /* ldrex r0,[r2] */
1108 - subs r0,r3,r0
1109 - .word 0x01820f91 /* strexeq r0,r1,[r2] */
1110 - teqeq r0,#1
1111 - beq 1b
1112 - mcr p15,0,r0,c7,c10,5
1113 - bx lr
1114 -.global __a_cas_v7
1115 -.hidden __a_cas_v7
1116 -__a_cas_v7:
1117 - mov r3,r0
1118 - .word 0xf57ff05b /* dmb ish */
1119 -1: .word 0xe1920f9f /* ldrex r0,[r2] */
1120 - subs r0,r3,r0
1121 - .word 0x01820f91 /* strexeq r0,r1,[r2] */
1122 - teqeq r0,#1
1123 - beq 1b
1124 - .word 0xf57ff05b /* dmb ish */
1125 - bx lr
1126 -
1127 -.global __aeabi_read_tp
1128 -.type __aeabi_read_tp,%function
1129 -__aeabi_read_tp:
1130 -
1131 -.global __a_gettp
1132 -.hidden __a_gettp
1133 -.type __a_gettp,%function
1134 -__a_gettp:
1135 - ldr r0,1f
1136 - ldr r0,[pc,r0]
1137 - add pc,pc,r0
1138 -1: .word __a_gettp_ptr-1b
1139 -.global __a_gettp_dummy
1140 -.hidden __a_gettp_dummy
1141 -__a_gettp_dummy:
1142 - mrc p15,0,r0,c13,c0,3
1143 - bx lr
1144 -
1145 -.data
1146 -.global __a_barrier_ptr
1147 -.hidden __a_barrier_ptr
1148 -__a_barrier_ptr:
1149 - .word 0
1150 -
1151 -.global __a_cas_ptr
1152 -.hidden __a_cas_ptr
1153 -__a_cas_ptr:
1154 - .word 0
1155 -
1156 -.global __a_gettp_ptr
1157 -.hidden __a_gettp_ptr
1158 -__a_gettp_ptr:
1159 - .word 0
1160 --- a/arch/arm/src/find_exidx.c
1161 +++ /dev/null
1162 @@ -1,42 +0,0 @@
1163 -#define _GNU_SOURCE
1164 -#include <link.h>
1165 -#include <stdint.h>
1166 -
1167 -struct find_exidx_data {
1168 - uintptr_t pc, exidx_start;
1169 - int exidx_len;
1170 -};
1171 -
1172 -static int find_exidx(struct dl_phdr_info *info, size_t size, void *ptr)
1173 -{
1174 - struct find_exidx_data *data = ptr;
1175 - const ElfW(Phdr) *phdr = info->dlpi_phdr;
1176 - uintptr_t addr, exidx_start = 0;
1177 - int i, match = 0, exidx_len = 0;
1178 -
1179 - for (i = info->dlpi_phnum; i > 0; i--, phdr++) {
1180 - addr = info->dlpi_addr + phdr->p_vaddr;
1181 - switch (phdr->p_type) {
1182 - case PT_LOAD:
1183 - match |= data->pc >= addr && data->pc < addr + phdr->p_memsz;
1184 - break;
1185 - case PT_ARM_EXIDX:
1186 - exidx_start = addr;
1187 - exidx_len = phdr->p_memsz;
1188 - break;
1189 - }
1190 - }
1191 - data->exidx_start = exidx_start;
1192 - data->exidx_len = exidx_len;
1193 - return match;
1194 -}
1195 -
1196 -uintptr_t __gnu_Unwind_Find_exidx(uintptr_t pc, int *pcount)
1197 -{
1198 - struct find_exidx_data data;
1199 - data.pc = pc;
1200 - if (dl_iterate_phdr(find_exidx, &data) <= 0)
1201 - return 0;
1202 - *pcount = data.exidx_len / 8;
1203 - return data.exidx_start;
1204 -}
1205 --- a/arch/i386/atomic.h
1206 +++ /dev/null
1207 @@ -1,110 +0,0 @@
1208 -#ifndef _INTERNAL_ATOMIC_H
1209 -#define _INTERNAL_ATOMIC_H
1210 -
1211 -#include <stdint.h>
1212 -
1213 -static inline int a_ctz_64(uint64_t x)
1214 -{
1215 - int r;
1216 - __asm__( "bsf %1,%0 ; jnz 1f ; bsf %2,%0 ; addl $32,%0\n1:"
1217 - : "=&r"(r) : "r"((unsigned)x), "r"((unsigned)(x>>32)) );
1218 - return r;
1219 -}
1220 -
1221 -static inline int a_ctz_l(unsigned long x)
1222 -{
1223 - long r;
1224 - __asm__( "bsf %1,%0" : "=r"(r) : "r"(x) );
1225 - return r;
1226 -}
1227 -
1228 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
1229 -{
1230 - __asm__( "lock ; andl %1, (%0) ; lock ; andl %2, 4(%0)"
1231 - : : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
1232 -}
1233 -
1234 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
1235 -{
1236 - __asm__( "lock ; orl %1, (%0) ; lock ; orl %2, 4(%0)"
1237 - : : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
1238 -}
1239 -
1240 -static inline void a_or_l(volatile void *p, long v)
1241 -{
1242 - __asm__( "lock ; orl %1, %0"
1243 - : "=m"(*(long *)p) : "r"(v) : "memory" );
1244 -}
1245 -
1246 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
1247 -{
1248 - __asm__( "lock ; cmpxchg %3, %1"
1249 - : "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
1250 - return t;
1251 -}
1252 -
1253 -static inline int a_cas(volatile int *p, int t, int s)
1254 -{
1255 - __asm__( "lock ; cmpxchg %3, %1"
1256 - : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
1257 - return t;
1258 -}
1259 -
1260 -static inline void a_or(volatile int *p, int v)
1261 -{
1262 - __asm__( "lock ; orl %1, %0"
1263 - : "=m"(*p) : "r"(v) : "memory" );
1264 -}
1265 -
1266 -static inline void a_and(volatile int *p, int v)
1267 -{
1268 - __asm__( "lock ; andl %1, %0"
1269 - : "=m"(*p) : "r"(v) : "memory" );
1270 -}
1271 -
1272 -static inline int a_swap(volatile int *x, int v)
1273 -{
1274 - __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
1275 - return v;
1276 -}
1277 -
1278 -#define a_xchg a_swap
1279 -
1280 -static inline int a_fetch_add(volatile int *x, int v)
1281 -{
1282 - __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
1283 - return v;
1284 -}
1285 -
1286 -static inline void a_inc(volatile int *x)
1287 -{
1288 - __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
1289 -}
1290 -
1291 -static inline void a_dec(volatile int *x)
1292 -{
1293 - __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
1294 -}
1295 -
1296 -static inline void a_store(volatile int *p, int x)
1297 -{
1298 - __asm__( "movl %1, %0 ; lock ; orl $0,(%%esp)" : "=m"(*p) : "r"(x) : "memory" );
1299 -}
1300 -
1301 -static inline void a_spin()
1302 -{
1303 - __asm__ __volatile__( "pause" : : : "memory" );
1304 -}
1305 -
1306 -static inline void a_barrier()
1307 -{
1308 - __asm__ __volatile__( "" : : : "memory" );
1309 -}
1310 -
1311 -static inline void a_crash()
1312 -{
1313 - __asm__ __volatile__( "hlt" : : : "memory" );
1314 -}
1315 -
1316 -
1317 -#endif
1318 --- /dev/null
1319 +++ b/arch/i386/atomic_arch.h
1320 @@ -0,0 +1,109 @@
1321 +#define a_ctz_64 a_ctz_64
1322 +static inline int a_ctz_64(uint64_t x)
1323 +{
1324 + int r;
1325 + __asm__( "bsf %1,%0 ; jnz 1f ; bsf %2,%0 ; addl $32,%0\n1:"
1326 + : "=&r"(r) : "r"((unsigned)x), "r"((unsigned)(x>>32)) );
1327 + return r;
1328 +}
1329 +
1330 +#define a_ctz_l a_ctz_l
1331 +static inline int a_ctz_l(unsigned long x)
1332 +{
1333 + long r;
1334 + __asm__( "bsf %1,%0" : "=r"(r) : "r"(x) );
1335 + return r;
1336 +}
1337 +
1338 +#define a_and_64 a_and_64
1339 +static inline void a_and_64(volatile uint64_t *p, uint64_t v)
1340 +{
1341 + __asm__( "lock ; andl %1, (%0) ; lock ; andl %2, 4(%0)"
1342 + : : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
1343 +}
1344 +
1345 +#define a_or_64 a_or_64
1346 +static inline void a_or_64(volatile uint64_t *p, uint64_t v)
1347 +{
1348 + __asm__( "lock ; orl %1, (%0) ; lock ; orl %2, 4(%0)"
1349 + : : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
1350 +}
1351 +
1352 +#define a_or_l a_or_l
1353 +static inline void a_or_l(volatile void *p, long v)
1354 +{
1355 + __asm__( "lock ; orl %1, %0"
1356 + : "=m"(*(long *)p) : "r"(v) : "memory" );
1357 +}
1358 +
1359 +#define a_cas a_cas
1360 +static inline int a_cas(volatile int *p, int t, int s)
1361 +{
1362 + __asm__( "lock ; cmpxchg %3, %1"
1363 + : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
1364 + return t;
1365 +}
1366 +
1367 +#define a_or a_or
1368 +static inline void a_or(volatile int *p, int v)
1369 +{
1370 + __asm__( "lock ; orl %1, %0"
1371 + : "=m"(*p) : "r"(v) : "memory" );
1372 +}
1373 +
1374 +#define a_and a_and
1375 +static inline void a_and(volatile int *p, int v)
1376 +{
1377 + __asm__( "lock ; andl %1, %0"
1378 + : "=m"(*p) : "r"(v) : "memory" );
1379 +}
1380 +
1381 +#define a_swap a_swap
1382 +static inline int a_swap(volatile int *x, int v)
1383 +{
1384 + __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
1385 + return v;
1386 +}
1387 +
1388 +#define a_fetch_add a_fetch_add
1389 +static inline int a_fetch_add(volatile int *x, int v)
1390 +{
1391 + __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
1392 + return v;
1393 +}
1394 +
1395 +#define a_inc a_inc
1396 +static inline void a_inc(volatile int *x)
1397 +{
1398 + __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
1399 +}
1400 +
1401 +#define a_dec a_dec
1402 +static inline void a_dec(volatile int *x)
1403 +{
1404 + __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
1405 +}
1406 +
1407 +#define a_store a_store
1408 +static inline void a_store(volatile int *p, int x)
1409 +{
1410 + __asm__( "movl %1, %0 ; lock ; orl $0,(%%esp)" : "=m"(*p) : "r"(x) : "memory" );
1411 +}
1412 +
1413 +#define a_spin a_spin
1414 +static inline void a_spin()
1415 +{
1416 + __asm__ __volatile__( "pause" : : : "memory" );
1417 +}
1418 +
1419 +#define a_barrier a_barrier
1420 +static inline void a_barrier()
1421 +{
1422 + __asm__ __volatile__( "" : : : "memory" );
1423 +}
1424 +
1425 +#define a_crash a_crash
1426 +static inline void a_crash()
1427 +{
1428 + __asm__ __volatile__( "hlt" : : : "memory" );
1429 +}
1430 --- a/arch/i386/bits/alltypes.h.in
1431 +++ b/arch/i386/bits/alltypes.h.in
1432 @@ -26,10 +26,12 @@ TYPEDEF long double float_t;
1433 TYPEDEF long double double_t;
1434 #endif
1435
1436 -#ifdef __cplusplus
1437 -TYPEDEF struct { alignas(8) long long __ll; long double __ld; } max_align_t;
1438 -#else
1439 +#if !defined(__cplusplus)
1440 TYPEDEF struct { _Alignas(8) long long __ll; long double __ld; } max_align_t;
1441 +#elif defined(__GNUC__)
1442 +TYPEDEF struct { __attribute__((__aligned__(8))) long long __ll; long double __ld; } max_align_t;
1443 +#else
1444 +TYPEDEF struct { alignas(8) long long __ll; long double __ld; } max_align_t;
1445 #endif
1446
1447 TYPEDEF long time_t;
1448 --- a/arch/i386/pthread_arch.h
1449 +++ b/arch/i386/pthread_arch.h
1450 @@ -7,4 +7,4 @@ static inline struct pthread *__pthread_
1451
1452 #define TP_ADJ(p) (p)
1453
1454 -#define CANCEL_REG_IP 14
1455 +#define MC_PC gregs[REG_EIP]
1456 --- a/arch/microblaze/atomic.h
1457 +++ /dev/null
1458 @@ -1,143 +0,0 @@
1459 -#ifndef _INTERNAL_ATOMIC_H
1460 -#define _INTERNAL_ATOMIC_H
1461 -
1462 -#include <stdint.h>
1463 -
1464 -static inline int a_ctz_l(unsigned long x)
1465 -{
1466 - static const char debruijn32[32] = {
1467 - 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
1468 - 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
1469 - };
1470 - return debruijn32[(x&-x)*0x076be629 >> 27];
1471 -}
1472 -
1473 -static inline int a_ctz_64(uint64_t x)
1474 -{
1475 - uint32_t y = x;
1476 - if (!y) {
1477 - y = x>>32;
1478 - return 32 + a_ctz_l(y);
1479 - }
1480 - return a_ctz_l(y);
1481 -}
1482 -
1483 -static inline int a_cas(volatile int *p, int t, int s)
1484 -{
1485 - register int old, tmp;
1486 - __asm__ __volatile__ (
1487 - " addi %0, r0, 0\n"
1488 - "1: lwx %0, %2, r0\n"
1489 - " rsubk %1, %0, %3\n"
1490 - " bnei %1, 1f\n"
1491 - " swx %4, %2, r0\n"
1492 - " addic %1, r0, 0\n"
1493 - " bnei %1, 1b\n"
1494 - "1: "
1495 - : "=&r"(old), "=&r"(tmp)
1496 - : "r"(p), "r"(t), "r"(s)
1497 - : "cc", "memory" );
1498 - return old;
1499 -}
1500 -
1501 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
1502 -{
1503 - return (void *)a_cas(p, (int)t, (int)s);
1504 -}
1505 -
1506 -static inline int a_swap(volatile int *x, int v)
1507 -{
1508 - register int old, tmp;
1509 - __asm__ __volatile__ (
1510 - " addi %0, r0, 0\n"
1511 - "1: lwx %0, %2, r0\n"
1512 - " swx %3, %2, r0\n"
1513 - " addic %1, r0, 0\n"
1514 - " bnei %1, 1b\n"
1515 - "1: "
1516 - : "=&r"(old), "=&r"(tmp)
1517 - : "r"(x), "r"(v)
1518 - : "cc", "memory" );
1519 - return old;
1520 -}
1521 -
1522 -static inline int a_fetch_add(volatile int *x, int v)
1523 -{
1524 - register int new, tmp;
1525 - __asm__ __volatile__ (
1526 - " addi %0, r0, 0\n"
1527 - "1: lwx %0, %2, r0\n"
1528 - " addk %0, %0, %3\n"
1529 - " swx %0, %2, r0\n"
1530 - " addic %1, r0, 0\n"
1531 - " bnei %1, 1b\n"
1532 - "1: "
1533 - : "=&r"(new), "=&r"(tmp)
1534 - : "r"(x), "r"(v)
1535 - : "cc", "memory" );
1536 - return new-v;
1537 -}
1538 -
1539 -static inline void a_inc(volatile int *x)
1540 -{
1541 - a_fetch_add(x, 1);
1542 -}
1543 -
1544 -static inline void a_dec(volatile int *x)
1545 -{
1546 - a_fetch_add(x, -1);
1547 -}
1548 -
1549 -static inline void a_store(volatile int *p, int x)
1550 -{
1551 - __asm__ __volatile__ (
1552 - "swi %1, %0"
1553 - : "=m"(*p) : "r"(x) : "memory" );
1554 -}
1555 -
1556 -#define a_spin a_barrier
1557 -
1558 -static inline void a_barrier()
1559 -{
1560 - a_cas(&(int){0}, 0, 0);
1561 -}
1562 -
1563 -static inline void a_crash()
1564 -{
1565 - *(volatile char *)0=0;
1566 -}
1567 -
1568 -static inline void a_and(volatile int *p, int v)
1569 -{
1570 - int old;
1571 - do old = *p;
1572 - while (a_cas(p, old, old&v) != old);
1573 -}
1574 -
1575 -static inline void a_or(volatile int *p, int v)
1576 -{
1577 - int old;
1578 - do old = *p;
1579 - while (a_cas(p, old, old|v) != old);
1580 -}
1581 -
1582 -static inline void a_or_l(volatile void *p, long v)
1583 -{
1584 - a_or(p, v);
1585 -}
1586 -
1587 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
1588 -{
1589 - union { uint64_t v; uint32_t r[2]; } u = { v };
1590 - a_and((int *)p, u.r[0]);
1591 - a_and((int *)p+1, u.r[1]);
1592 -}
1593 -
1594 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
1595 -{
1596 - union { uint64_t v; uint32_t r[2]; } u = { v };
1597 - a_or((int *)p, u.r[0]);
1598 - a_or((int *)p+1, u.r[1]);
1599 -}
1600 -
1601 -#endif
1602 --- /dev/null
1603 +++ b/arch/microblaze/atomic_arch.h
1604 @@ -0,0 +1,53 @@
1605 +#define a_cas a_cas
1606 +static inline int a_cas(volatile int *p, int t, int s)
1607 +{
1608 + register int old, tmp;
1609 + __asm__ __volatile__ (
1610 + " addi %0, r0, 0\n"
1611 + "1: lwx %0, %2, r0\n"
1612 + " rsubk %1, %0, %3\n"
1613 + " bnei %1, 1f\n"
1614 + " swx %4, %2, r0\n"
1615 + " addic %1, r0, 0\n"
1616 + " bnei %1, 1b\n"
1617 + "1: "
1618 + : "=&r"(old), "=&r"(tmp)
1619 + : "r"(p), "r"(t), "r"(s)
1620 + : "cc", "memory" );
1621 + return old;
1622 +}
1623 +
1624 +#define a_swap a_swap
1625 +static inline int a_swap(volatile int *x, int v)
1626 +{
1627 + register int old, tmp;
1628 + __asm__ __volatile__ (
1629 + " addi %0, r0, 0\n"
1630 + "1: lwx %0, %2, r0\n"
1631 + " swx %3, %2, r0\n"
1632 + " addic %1, r0, 0\n"
1633 + " bnei %1, 1b\n"
1634 + "1: "
1635 + : "=&r"(old), "=&r"(tmp)
1636 + : "r"(x), "r"(v)
1637 + : "cc", "memory" );
1638 + return old;
1639 +}
1640 +
1641 +#define a_fetch_add a_fetch_add
1642 +static inline int a_fetch_add(volatile int *x, int v)
1643 +{
1644 + register int new, tmp;
1645 + __asm__ __volatile__ (
1646 + " addi %0, r0, 0\n"
1647 + "1: lwx %0, %2, r0\n"
1648 + " addk %0, %0, %3\n"
1649 + " swx %0, %2, r0\n"
1650 + " addic %1, r0, 0\n"
1651 + " bnei %1, 1b\n"
1652 + "1: "
1653 + : "=&r"(new), "=&r"(tmp)
1654 + : "r"(x), "r"(v)
1655 + : "cc", "memory" );
1656 + return new-v;
1657 +}
1658 --- a/arch/microblaze/pthread_arch.h
1659 +++ b/arch/microblaze/pthread_arch.h
1660 @@ -7,4 +7,4 @@ static inline struct pthread *__pthread_
1661
1662 #define TP_ADJ(p) (p)
1663
1664 -#define CANCEL_REG_IP 32
1665 +#define MC_PC regs.pc
1666 --- a/arch/mips/atomic.h
1667 +++ /dev/null
1668 @@ -1,205 +0,0 @@
1669 -#ifndef _INTERNAL_ATOMIC_H
1670 -#define _INTERNAL_ATOMIC_H
1671 -
1672 -#include <stdint.h>
1673 -
1674 -static inline int a_ctz_l(unsigned long x)
1675 -{
1676 - static const char debruijn32[32] = {
1677 - 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
1678 - 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
1679 - };
1680 - return debruijn32[(x&-x)*0x076be629 >> 27];
1681 -}
1682 -
1683 -static inline int a_ctz_64(uint64_t x)
1684 -{
1685 - uint32_t y = x;
1686 - if (!y) {
1687 - y = x>>32;
1688 - return 32 + a_ctz_l(y);
1689 - }
1690 - return a_ctz_l(y);
1691 -}
1692 -
1693 -static inline int a_cas(volatile int *p, int t, int s)
1694 -{
1695 - int dummy;
1696 - __asm__ __volatile__(
1697 - ".set push\n"
1698 - ".set mips2\n"
1699 - ".set noreorder\n"
1700 - " sync\n"
1701 - "1: ll %0, %2\n"
1702 - " bne %0, %3, 1f\n"
1703 - " addu %1, %4, $0\n"
1704 - " sc %1, %2\n"
1705 - " beq %1, $0, 1b\n"
1706 - " nop\n"
1707 - " sync\n"
1708 - "1: \n"
1709 - ".set pop\n"
1710 - : "=&r"(t), "=&r"(dummy), "+m"(*p) : "r"(t), "r"(s) : "memory" );
1711 - return t;
1712 -}
1713 -
1714 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
1715 -{
1716 - return (void *)a_cas(p, (int)t, (int)s);
1717 -}
1718 -
1719 -static inline int a_swap(volatile int *x, int v)
1720 -{
1721 - int old, dummy;
1722 - __asm__ __volatile__(
1723 - ".set push\n"
1724 - ".set mips2\n"
1725 - ".set noreorder\n"
1726 - " sync\n"
1727 - "1: ll %0, %2\n"
1728 - " addu %1, %3, $0\n"
1729 - " sc %1, %2\n"
1730 - " beq %1, $0, 1b\n"
1731 - " nop\n"
1732 - " sync\n"
1733 - ".set pop\n"
1734 - : "=&r"(old), "=&r"(dummy), "+m"(*x) : "r"(v) : "memory" );
1735 - return old;
1736 -}
1737 -
1738 -static inline int a_fetch_add(volatile int *x, int v)
1739 -{
1740 - int old, dummy;
1741 - __asm__ __volatile__(
1742 - ".set push\n"
1743 - ".set mips2\n"
1744 - ".set noreorder\n"
1745 - " sync\n"
1746 - "1: ll %0, %2\n"
1747 - " addu %1, %0, %3\n"
1748 - " sc %1, %2\n"
1749 - " beq %1, $0, 1b\n"
1750 - " nop\n"
1751 - " sync\n"
1752 - ".set pop\n"
1753 - : "=&r"(old), "=&r"(dummy), "+m"(*x) : "r"(v) : "memory" );
1754 - return old;
1755 -}
1756 -
1757 -static inline void a_inc(volatile int *x)
1758 -{
1759 - int dummy;
1760 - __asm__ __volatile__(
1761 - ".set push\n"
1762 - ".set mips2\n"
1763 - ".set noreorder\n"
1764 - " sync\n"
1765 - "1: ll %0, %1\n"
1766 - " addu %0, %0, 1\n"
1767 - " sc %0, %1\n"
1768 - " beq %0, $0, 1b\n"
1769 - " nop\n"
1770 - " sync\n"
1771 - ".set pop\n"
1772 - : "=&r"(dummy), "+m"(*x) : : "memory" );
1773 -}
1774 -
1775 -static inline void a_dec(volatile int *x)
1776 -{
1777 - int dummy;
1778 - __asm__ __volatile__(
1779 - ".set push\n"
1780 - ".set mips2\n"
1781 - ".set noreorder\n"
1782 - " sync\n"
1783 - "1: ll %0, %1\n"
1784 - " subu %0, %0, 1\n"
1785 - " sc %0, %1\n"
1786 - " beq %0, $0, 1b\n"
1787 - " nop\n"
1788 - " sync\n"
1789 - ".set pop\n"
1790 - : "=&r"(dummy), "+m"(*x) : : "memory" );
1791 -}
1792 -
1793 -static inline void a_store(volatile int *p, int x)
1794 -{
1795 - __asm__ __volatile__(
1796 - ".set push\n"
1797 - ".set mips2\n"
1798 - ".set noreorder\n"
1799 - " sync\n"
1800 - " sw %1, %0\n"
1801 - " sync\n"
1802 - ".set pop\n"
1803 - : "+m"(*p) : "r"(x) : "memory" );
1804 -}
1805 -
1806 -#define a_spin a_barrier
1807 -
1808 -static inline void a_barrier()
1809 -{
1810 - a_cas(&(int){0}, 0, 0);
1811 -}
1812 -
1813 -static inline void a_crash()
1814 -{
1815 - *(volatile char *)0=0;
1816 -}
1817 -
1818 -static inline void a_and(volatile int *p, int v)
1819 -{
1820 - int dummy;
1821 - __asm__ __volatile__(
1822 - ".set push\n"
1823 - ".set mips2\n"
1824 - ".set noreorder\n"
1825 - " sync\n"
1826 - "1: ll %0, %1\n"
1827 - " and %0, %0, %2\n"
1828 - " sc %0, %1\n"
1829 - " beq %0, $0, 1b\n"
1830 - " nop\n"
1831 - " sync\n"
1832 - ".set pop\n"
1833 - : "=&r"(dummy), "+m"(*p) : "r"(v) : "memory" );
1834 -}
1835 -
1836 -static inline void a_or(volatile int *p, int v)
1837 -{
1838 - int dummy;
1839 - __asm__ __volatile__(
1840 - ".set push\n"
1841 - ".set mips2\n"
1842 - ".set noreorder\n"
1843 - " sync\n"
1844 - "1: ll %0, %1\n"
1845 - " or %0, %0, %2\n"
1846 - " sc %0, %1\n"
1847 - " beq %0, $0, 1b\n"
1848 - " nop\n"
1849 - " sync\n"
1850 - ".set pop\n"
1851 - : "=&r"(dummy), "+m"(*p) : "r"(v) : "memory" );
1852 -}
1853 -
1854 -static inline void a_or_l(volatile void *p, long v)
1855 -{
1856 - a_or(p, v);
1857 -}
1858 -
1859 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
1860 -{
1861 - union { uint64_t v; uint32_t r[2]; } u = { v };
1862 - a_and((int *)p, u.r[0]);
1863 - a_and((int *)p+1, u.r[1]);
1864 -}
1865 -
1866 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
1867 -{
1868 - union { uint64_t v; uint32_t r[2]; } u = { v };
1869 - a_or((int *)p, u.r[0]);
1870 - a_or((int *)p+1, u.r[1]);
1871 -}
1872 -
1873 -#endif
1874 --- /dev/null
1875 +++ b/arch/mips/atomic_arch.h
1876 @@ -0,0 +1,39 @@
1877 +#define a_ll a_ll
1878 +static inline int a_ll(volatile int *p)
1879 +{
1880 + int v;
1881 + __asm__ __volatile__ (
1882 + ".set push ; .set mips2\n\t"
1883 + "ll %0, %1"
1884 + "\n\t.set pop"
1885 + : "=r"(v) : "m"(*p));
1886 + return v;
1887 +}
1888 +
1889 +#define a_sc a_sc
1890 +static inline int a_sc(volatile int *p, int v)
1891 +{
1892 + int r;
1893 + __asm__ __volatile__ (
1894 + ".set push ; .set mips2\n\t"
1895 + "sc %0, %1"
1896 + "\n\t.set pop"
1897 + : "=r"(r), "=m"(*p) : "0"(v) : "memory");
1898 + return r;
1899 +}
1900 +
1901 +#define a_barrier a_barrier
1902 +static inline void a_barrier()
1903 +{
1904 + /* mips2 sync, but using too many directives causes
1905 + * gcc not to inline it, so encode with .long instead. */
1906 + __asm__ __volatile__ (".long 0xf" : : : "memory");
1907 +#if 0
1908 + __asm__ __volatile__ (
1909 + ".set push ; .set mips2 ; sync ; .set pop"
1910 + : : : "memory");
1911 +#endif
1912 +}
1913 +
1914 +#define a_pre_llsc a_barrier
1915 +#define a_post_llsc a_barrier
1916 --- a/arch/mips/crt_arch.h
1917 +++ b/arch/mips/crt_arch.h
1918 @@ -4,13 +4,16 @@ __asm__(
1919 ".text \n"
1920 ".global _" START "\n"
1921 ".global " START "\n"
1922 +".global " START "_data\n"
1923 ".type _" START ", @function\n"
1924 ".type " START ", @function\n"
1925 +".type " START "_data, @function\n"
1926 "_" START ":\n"
1927 "" START ":\n"
1928 " bal 1f \n"
1929 " move $fp, $0 \n"
1930 -"2: .gpword 2b \n"
1931 +"" START "_data: \n"
1932 +" .gpword " START "_data \n"
1933 " .gpword " START "_c \n"
1934 ".weak _DYNAMIC \n"
1935 ".hidden _DYNAMIC \n"
1936 --- a/arch/mips/pthread_arch.h
1937 +++ b/arch/mips/pthread_arch.h
1938 @@ -16,4 +16,4 @@ static inline struct pthread *__pthread_
1939
1940 #define DTP_OFFSET 0x8000
1941
1942 -#define CANCEL_REG_IP (3-(union {int __i; char __b;}){1}.__b)
1943 +#define MC_PC pc
1944 --- a/arch/mips/syscall_arch.h
1945 +++ b/arch/mips/syscall_arch.h
1946 @@ -3,9 +3,7 @@
1947 ((union { long long ll; long l[2]; }){ .ll = x }).l[1]
1948 #define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))
1949
1950 -#ifdef SHARED
1951 __attribute__((visibility("hidden")))
1952 -#endif
1953 long (__syscall)(long, ...);
1954
1955 #define SYSCALL_RLIM_INFINITY (-1UL/2)
1956 --- a/arch/or1k/atomic.h
1957 +++ /dev/null
1958 @@ -1,120 +0,0 @@
1959 -#ifndef _INTERNAL_ATOMIC_H
1960 -#define _INTERNAL_ATOMIC_H
1961 -
1962 -#include <stdint.h>
1963 -
1964 -static inline int a_ctz_l(unsigned long x)
1965 -{
1966 - static const char debruijn32[32] = {
1967 - 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
1968 - 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
1969 - };
1970 - return debruijn32[(x&-x)*0x076be629 >> 27];
1971 -}
1972 -
1973 -static inline int a_ctz_64(uint64_t x)
1974 -{
1975 - uint32_t y = x;
1976 - if (!y) {
1977 - y = x>>32;
1978 - return 32 + a_ctz_l(y);
1979 - }
1980 - return a_ctz_l(y);
1981 -}
1982 -
1983 -static inline int a_cas(volatile int *p, int t, int s)
1984 -{
1985 - __asm__("1: l.lwa %0, %1\n"
1986 - " l.sfeq %0, %2\n"
1987 - " l.bnf 1f\n"
1988 - " l.nop\n"
1989 - " l.swa %1, %3\n"
1990 - " l.bnf 1b\n"
1991 - " l.nop\n"
1992 - "1: \n"
1993 - : "=&r"(t), "+m"(*p) : "r"(t), "r"(s) : "cc", "memory" );
1994 - return t;
1995 -}
1996 -
1997 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
1998 -{
1999 - return (void *)a_cas(p, (int)t, (int)s);
2000 -}
2001 -
2002 -static inline int a_swap(volatile int *x, int v)
2003 -{
2004 - int old;
2005 - do old = *x;
2006 - while (a_cas(x, old, v) != old);
2007 - return old;
2008 -}
2009 -
2010 -static inline int a_fetch_add(volatile int *x, int v)
2011 -{
2012 - int old;
2013 - do old = *x;
2014 - while (a_cas(x, old, old+v) != old);
2015 - return old;
2016 -}
2017 -
2018 -static inline void a_inc(volatile int *x)
2019 -{
2020 - a_fetch_add(x, 1);
2021 -}
2022 -
2023 -static inline void a_dec(volatile int *x)
2024 -{
2025 - a_fetch_add(x, -1);
2026 -}
2027 -
2028 -static inline void a_store(volatile int *p, int x)
2029 -{
2030 - a_swap(p, x);
2031 -}
2032 -
2033 -#define a_spin a_barrier
2034 -
2035 -static inline void a_barrier()
2036 -{
2037 - a_cas(&(int){0}, 0, 0);
2038 -}
2039 -
2040 -static inline void a_crash()
2041 -{
2042 - *(volatile char *)0=0;
2043 -}
2044 -
2045 -static inline void a_and(volatile int *p, int v)
2046 -{
2047 - int old;
2048 - do old = *p;
2049 - while (a_cas(p, old, old&v) != old);
2050 -}
2051 -
2052 -static inline void a_or(volatile int *p, int v)
2053 -{
2054 - int old;
2055 - do old = *p;
2056 - while (a_cas(p, old, old|v) != old);
2057 -}
2058 -
2059 -static inline void a_or_l(volatile void *p, long v)
2060 -{
2061 - a_or(p, v);
2062 -}
2063 -
2064 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
2065 -{
2066 - union { uint64_t v; uint32_t r[2]; } u = { v };
2067 - a_and((int *)p, u.r[0]);
2068 - a_and((int *)p+1, u.r[1]);
2069 -}
2070 -
2071 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
2072 -{
2073 - union { uint64_t v; uint32_t r[2]; } u = { v };
2074 - a_or((int *)p, u.r[0]);
2075 - a_or((int *)p+1, u.r[1]);
2076 -}
2077 -
2078 -#endif
2079 --- /dev/null
2080 +++ b/arch/or1k/atomic_arch.h
2081 @@ -0,0 +1,14 @@
2082 +#define a_cas a_cas
2083 +static inline int a_cas(volatile int *p, int t, int s)
2084 +{
2085 + __asm__("1: l.lwa %0, %1\n"
2086 + " l.sfeq %0, %2\n"
2087 + " l.bnf 1f\n"
2088 + " l.nop\n"
2089 + " l.swa %1, %3\n"
2090 + " l.bnf 1b\n"
2091 + " l.nop\n"
2092 + "1: \n"
2093 + : "=&r"(t), "+m"(*p) : "r"(t), "r"(s) : "cc", "memory" );
2094 + return t;
2095 +}
2096 --- a/arch/or1k/pthread_arch.h
2097 +++ b/arch/or1k/pthread_arch.h
2098 @@ -14,5 +14,4 @@ static inline struct pthread *__pthread_
2099 #define TLS_ABOVE_TP
2100 #define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread))
2101
2102 -/* word-offset to 'pc' in mcontext_t */
2103 -#define CANCEL_REG_IP 32
2104 +#define MC_PC regs.pc
2105 --- a/arch/powerpc/atomic.h
2106 +++ /dev/null
2107 @@ -1,126 +0,0 @@
2108 -#ifndef _INTERNAL_ATOMIC_H
2109 -#define _INTERNAL_ATOMIC_H
2110 -
2111 -#include <stdint.h>
2112 -#include <endian.h>
2113 -
2114 -static inline int a_ctz_l(unsigned long x)
2115 -{
2116 - static const char debruijn32[32] = {
2117 - 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
2118 - 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
2119 - };
2120 - return debruijn32[(x&-x)*0x076be629 >> 27];
2121 -}
2122 -
2123 -static inline int a_ctz_64(uint64_t x)
2124 -{
2125 - uint32_t y = x;
2126 - if (!y) {
2127 - y = x>>32;
2128 - return 32 + a_ctz_l(y);
2129 - }
2130 - return a_ctz_l(y);
2131 -}
2132 -
2133 -static inline int a_cas(volatile int *p, int t, int s)
2134 -{
2135 - __asm__("\n"
2136 - " sync\n"
2137 - "1: lwarx %0, 0, %4\n"
2138 - " cmpw %0, %2\n"
2139 - " bne 1f\n"
2140 - " stwcx. %3, 0, %4\n"
2141 - " bne- 1b\n"
2142 - " isync\n"
2143 - "1: \n"
2144 - : "=&r"(t), "+m"(*p) : "r"(t), "r"(s), "r"(p) : "cc", "memory" );
2145 - return t;
2146 -}
2147 -
2148 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
2149 -{
2150 - return (void *)a_cas(p, (int)t, (int)s);
2151 -}
2152 -
2153 -static inline int a_swap(volatile int *x, int v)
2154 -{
2155 - int old;
2156 - do old = *x;
2157 - while (a_cas(x, old, v) != old);
2158 - return old;
2159 -}
2160 -
2161 -static inline int a_fetch_add(volatile int *x, int v)
2162 -{
2163 - int old;
2164 - do old = *x;
2165 - while (a_cas(x, old, old+v) != old);
2166 - return old;
2167 -}
2168 -
2169 -static inline void a_inc(volatile int *x)
2170 -{
2171 - a_fetch_add(x, 1);
2172 -}
2173 -
2174 -static inline void a_dec(volatile int *x)
2175 -{
2176 - a_fetch_add(x, -1);
2177 -}
2178 -
2179 -static inline void a_store(volatile int *p, int x)
2180 -{
2181 - __asm__ __volatile__ ("\n"
2182 - " sync\n"
2183 - " stw %1, %0\n"
2184 - " isync\n"
2185 - : "=m"(*p) : "r"(x) : "memory" );
2186 -}
2187 -
2188 -#define a_spin a_barrier
2189 -
2190 -static inline void a_barrier()
2191 -{
2192 - a_cas(&(int){0}, 0, 0);
2193 -}
2194 -
2195 -static inline void a_crash()
2196 -{
2197 - *(volatile char *)0=0;
2198 -}
2199 -
2200 -static inline void a_and(volatile int *p, int v)
2201 -{
2202 - int old;
2203 - do old = *p;
2204 - while (a_cas(p, old, old&v) != old);
2205 -}
2206 -
2207 -static inline void a_or(volatile int *p, int v)
2208 -{
2209 - int old;
2210 - do old = *p;
2211 - while (a_cas(p, old, old|v) != old);
2212 -}
2213 -
2214 -static inline void a_or_l(volatile void *p, long v)
2215 -{
2216 - a_or(p, v);
2217 -}
2218 -
2219 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
2220 -{
2221 - union { uint64_t v; uint32_t r[2]; } u = { v };
2222 - a_and((int *)p, u.r[0]);
2223 - a_and((int *)p+1, u.r[1]);
2224 -}
2225 -
2226 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
2227 -{
2228 - union { uint64_t v; uint32_t r[2]; } u = { v };
2229 - a_or((int *)p, u.r[0]);
2230 - a_or((int *)p+1, u.r[1]);
2231 -}
2232 -
2233 -#endif
2234 --- /dev/null
2235 +++ b/arch/powerpc/atomic_arch.h
2236 @@ -0,0 +1,15 @@
2237 +#define a_cas a_cas
2238 +static inline int a_cas(volatile int *p, int t, int s)
2239 +{
2240 + __asm__("\n"
2241 + " sync\n"
2242 + "1: lwarx %0, 0, %4\n"
2243 + " cmpw %0, %2\n"
2244 + " bne 1f\n"
2245 + " stwcx. %3, 0, %4\n"
2246 + " bne- 1b\n"
2247 + " isync\n"
2248 + "1: \n"
2249 + : "=&r"(t), "+m"(*p) : "r"(t), "r"(s), "r"(p) : "cc", "memory" );
2250 + return t;
2251 +}
2252 --- a/arch/powerpc/pthread_arch.h
2253 +++ b/arch/powerpc/pthread_arch.h
2254 @@ -15,9 +15,8 @@ static inline struct pthread *__pthread_
2255
2256 #define DTP_OFFSET 0x8000
2257
2258 -// offset of the PC register in mcontext_t, divided by the system wordsize
2259 // the kernel calls the ip "nip", it's the first saved value after the 32
2260 // GPRs.
2261 -#define CANCEL_REG_IP 32
2262 +#define MC_PC gregs[32]
2263
2264 #define CANARY canary_at_end
2265 --- a/arch/sh/atomic.h
2266 +++ /dev/null
2267 @@ -1,168 +0,0 @@
2268 -#ifndef _INTERNAL_ATOMIC_H
2269 -#define _INTERNAL_ATOMIC_H
2270 -
2271 -#include <stdint.h>
2272 -
2273 -static inline int a_ctz_l(unsigned long x)
2274 -{
2275 - static const char debruijn32[32] = {
2276 - 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
2277 - 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
2278 - };
2279 - return debruijn32[(x&-x)*0x076be629 >> 27];
2280 -}
2281 -
2282 -static inline int a_ctz_64(uint64_t x)
2283 -{
2284 - uint32_t y = x;
2285 - if (!y) {
2286 - y = x>>32;
2287 - return 32 + a_ctz_l(y);
2288 - }
2289 - return a_ctz_l(y);
2290 -}
2291 -
2292 -#define LLSC_CLOBBERS "r0", "t", "memory"
2293 -#define LLSC_START(mem) "synco\n" \
2294 - "0: movli.l @" mem ", r0\n"
2295 -#define LLSC_END(mem) \
2296 - "1: movco.l r0, @" mem "\n" \
2297 - " bf 0b\n" \
2298 - " synco\n"
2299 -
2300 -static inline int __sh_cas_llsc(volatile int *p, int t, int s)
2301 -{
2302 - int old;
2303 - __asm__ __volatile__(
2304 - LLSC_START("%1")
2305 - " mov r0, %0\n"
2306 - " cmp/eq %0, %2\n"
2307 - " bf 1f\n"
2308 - " mov %3, r0\n"
2309 - LLSC_END("%1")
2310 - : "=&r"(old) : "r"(p), "r"(t), "r"(s) : LLSC_CLOBBERS);
2311 - return old;
2312 -}
2313 -
2314 -static inline int __sh_swap_llsc(volatile int *x, int v)
2315 -{
2316 - int old;
2317 - __asm__ __volatile__(
2318 - LLSC_START("%1")
2319 - " mov r0, %0\n"
2320 - " mov %2, r0\n"
2321 - LLSC_END("%1")
2322 - : "=&r"(old) : "r"(x), "r"(v) : LLSC_CLOBBERS);
2323 - return old;
2324 -}
2325 -
2326 -static inline int __sh_fetch_add_llsc(volatile int *x, int v)
2327 -{
2328 - int old;
2329 - __asm__ __volatile__(
2330 - LLSC_START("%1")
2331 - " mov r0, %0\n"
2332 - " add %2, r0\n"
2333 - LLSC_END("%1")
2334 - : "=&r"(old) : "r"(x), "r"(v) : LLSC_CLOBBERS);
2335 - return old;
2336 -}
2337 -
2338 -static inline void __sh_store_llsc(volatile int *p, int x)
2339 -{
2340 - __asm__ __volatile__(
2341 - " synco\n"
2342 - " mov.l %1, @%0\n"
2343 - " synco\n"
2344 - : : "r"(p), "r"(x) : "memory");
2345 -}
2346 -
2347 -static inline void __sh_and_llsc(volatile int *x, int v)
2348 -{
2349 - __asm__ __volatile__(
2350 - LLSC_START("%0")
2351 - " and %1, r0\n"
2352 - LLSC_END("%0")
2353 - : : "r"(x), "r"(v) : LLSC_CLOBBERS);
2354 -}
2355 -
2356 -static inline void __sh_or_llsc(volatile int *x, int v)
2357 -{
2358 - __asm__ __volatile__(
2359 - LLSC_START("%0")
2360 - " or %1, r0\n"
2361 - LLSC_END("%0")
2362 - : : "r"(x), "r"(v) : LLSC_CLOBBERS);
2363 -}
2364 -
2365 -#ifdef __SH4A__
2366 -#define a_cas(p,t,s) __sh_cas_llsc(p,t,s)
2367 -#define a_swap(x,v) __sh_swap_llsc(x,v)
2368 -#define a_fetch_add(x,v) __sh_fetch_add_llsc(x, v)
2369 -#define a_store(x,v) __sh_store_llsc(x, v)
2370 -#define a_and(x,v) __sh_and_llsc(x, v)
2371 -#define a_or(x,v) __sh_or_llsc(x, v)
2372 -#else
2373 -
2374 -int __sh_cas(volatile int *, int, int);
2375 -int __sh_swap(volatile int *, int);
2376 -int __sh_fetch_add(volatile int *, int);
2377 -void __sh_store(volatile int *, int);
2378 -void __sh_and(volatile int *, int);
2379 -void __sh_or(volatile int *, int);
2380 -
2381 -#define a_cas(p,t,s) __sh_cas(p,t,s)
2382 -#define a_swap(x,v) __sh_swap(x,v)
2383 -#define a_fetch_add(x,v) __sh_fetch_add(x, v)
2384 -#define a_store(x,v) __sh_store(x, v)
2385 -#define a_and(x,v) __sh_and(x, v)
2386 -#define a_or(x,v) __sh_or(x, v)
2387 -#endif
2388 -
2389 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
2390 -{
2391 - return (void *)a_cas(p, (int)t, (int)s);
2392 -}
2393 -
2394 -static inline void a_inc(volatile int *x)
2395 -{
2396 - a_fetch_add(x, 1);
2397 -}
2398 -
2399 -static inline void a_dec(volatile int *x)
2400 -{
2401 - a_fetch_add(x, -1);
2402 -}
2403 -
2404 -#define a_spin a_barrier
2405 -
2406 -static inline void a_barrier()
2407 -{
2408 - a_cas(&(int){0}, 0, 0);
2409 -}
2410 -
2411 -static inline void a_crash()
2412 -{
2413 - *(volatile char *)0=0;
2414 -}
2415 -
2416 -static inline void a_or_l(volatile void *p, long v)
2417 -{
2418 - a_or(p, v);
2419 -}
2420 -
2421 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
2422 -{
2423 - union { uint64_t v; uint32_t r[2]; } u = { v };
2424 - a_and((int *)p, u.r[0]);
2425 - a_and((int *)p+1, u.r[1]);
2426 -}
2427 -
2428 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
2429 -{
2430 - union { uint64_t v; uint32_t r[2]; } u = { v };
2431 - a_or((int *)p, u.r[0]);
2432 - a_or((int *)p+1, u.r[1]);
2433 -}
2434 -
2435 -#endif
2436 --- /dev/null
2437 +++ b/arch/sh/atomic_arch.h
2438 @@ -0,0 +1,46 @@
2439 +#if defined(__SH4A__)
2440 +
2441 +#define a_ll a_ll
2442 +static inline int a_ll(volatile int *p)
2443 +{
2444 + int v;
2445 + __asm__ __volatile__ ("movli.l @%1, %0" : "=z"(v) : "r"(p), "m"(*p));
2446 + return v;
2447 +}
2448 +
2449 +#define a_sc a_sc
2450 +static inline int a_sc(volatile int *p, int v)
2451 +{
2452 + int r;
2453 + __asm__ __volatile__ (
2454 + "movco.l %2, @%3 ; movt %0"
2455 + : "=r"(r), "=m"(*p) : "z"(v), "r"(p) : "memory", "cc");
2456 + return r;
2457 +}
2458 +
2459 +#define a_barrier a_barrier
2460 +static inline void a_barrier()
2461 +{
2462 + __asm__ __volatile__ ("synco" : : "memory");
2463 +}
2464 +
2465 +#define a_pre_llsc a_barrier
2466 +#define a_post_llsc a_barrier
2467 +
2468 +#else
2469 +
2470 +#define a_cas a_cas
2471 +__attribute__((__visibility__("hidden"))) extern const void *__sh_cas_ptr;
2472 +static inline int a_cas(volatile int *p, int t, int s)
2473 +{
2474 + register int r1 __asm__("r1");
2475 + register int r2 __asm__("r2") = t;
2476 + register int r3 __asm__("r3") = s;
2477 + __asm__ __volatile__ (
2478 + "jsr @%4 ; nop"
2479 + : "=r"(r1), "+r"(r3) : "z"(p), "r"(r2), "r"(__sh_cas_ptr)
2480 + : "memory", "pr", "cc");
2481 + return r3;
2482 +}
2483 +
2484 +#endif
2485 --- a/arch/sh/crt_arch.h
2486 +++ b/arch/sh/crt_arch.h
2487 @@ -22,7 +22,8 @@ START ": \n"
2488 " mov.l 1f, r5 \n"
2489 " mov.l 1f+4, r6 \n"
2490 " add r0, r5 \n"
2491 -" bsr __fdpic_fixup \n"
2492 +" mov.l 4f, r1 \n"
2493 +"5: bsrf r1 \n"
2494 " add r0, r6 \n"
2495 " mov r0, r12 \n"
2496 #endif
2497 @@ -31,11 +32,16 @@ START ": \n"
2498 " mov.l r9, @-r15 \n"
2499 " mov.l r8, @-r15 \n"
2500 " mov #-16, r0 \n"
2501 -" bsr " START "_c \n"
2502 +" mov.l 2f, r1 \n"
2503 +"3: bsrf r1 \n"
2504 " and r0, r15 \n"
2505 ".align 2 \n"
2506 "1: .long __ROFIXUP_LIST__@PCREL \n"
2507 " .long __ROFIXUP_END__@PCREL + 4 \n"
2508 +"2: .long " START "_c@PCREL - (3b+4-.) \n"
2509 +#ifndef SHARED
2510 +"4: .long __fdpic_fixup@PCREL - (5b+4-.) \n"
2511 +#endif
2512 );
2513
2514 #ifndef SHARED
2515 @@ -53,13 +59,14 @@ START ": \n"
2516 " add r0, r5 \n"
2517 " mov r15, r4 \n"
2518 " mov #-16, r0 \n"
2519 -" and r0, r15 \n"
2520 -" bsr " START "_c \n"
2521 -" nop \n"
2522 +" mov.l 2f, r1 \n"
2523 +"3: bsrf r1 \n"
2524 +" and r0, r15 \n"
2525 ".align 2 \n"
2526 ".weak _DYNAMIC \n"
2527 ".hidden _DYNAMIC \n"
2528 "1: .long _DYNAMIC-. \n"
2529 +"2: .long " START "_c@PCREL - (3b+4-.) \n"
2530 );
2531
2532 #endif
2533 --- a/arch/sh/pthread_arch.h
2534 +++ b/arch/sh/pthread_arch.h
2535 @@ -8,4 +8,4 @@ static inline struct pthread *__pthread_
2536 #define TLS_ABOVE_TP
2537 #define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread) - 8)
2538
2539 -#define CANCEL_REG_IP 17
2540 +#define MC_PC sc_pc
2541 --- a/arch/sh/reloc.h
2542 +++ b/arch/sh/reloc.h
2543 @@ -32,6 +32,8 @@
2544 #define REL_DTPOFF R_SH_TLS_DTPOFF32
2545 #define REL_TPOFF R_SH_TLS_TPOFF32
2546
2547 +#define DL_NOMMU_SUPPORT 1
2548 +
2549 #if __SH_FDPIC__
2550 #define REL_FUNCDESC R_SH_FUNCDESC
2551 #define REL_FUNCDESC_VAL R_SH_FUNCDESC_VALUE
2552 --- a/arch/sh/src/__set_thread_area.c
2553 +++ /dev/null
2554 @@ -1,34 +0,0 @@
2555 -#include "pthread_impl.h"
2556 -#include "libc.h"
2557 -#include "sh_atomic.h"
2558 -#include <elf.h>
2559 -
2560 -/* Also perform sh-specific init */
2561 -
2562 -#define CPU_HAS_LLSC 0x0040
2563 -
2564 -__attribute__((__visibility__("hidden"))) unsigned __sh_atomic_model, __sh_nommu;
2565 -
2566 -int __set_thread_area(void *p)
2567 -{
2568 - size_t *aux;
2569 - __asm__ __volatile__ ( "ldc %0, gbr" : : "r"(p) : "memory" );
2570 -#ifndef __SH4A__
2571 - if (__hwcap & CPU_HAS_LLSC) {
2572 - __sh_atomic_model = SH_A_LLSC;
2573 - return 0;
2574 - }
2575 -#if !defined(__SH3__) && !defined(__SH4__)
2576 - for (aux=libc.auxv; *aux; aux+=2) {
2577 - if (*aux != AT_PLATFORM) continue;
2578 - const char *s = (void *)aux[1];
2579 - if (s[0]!='s' || s[1]!='h' || s[2]!='2' || s[3]-'0'<10u) break;
2580 - __sh_atomic_model = SH_A_IMASK;
2581 - __sh_nommu = 1;
2582 - return 0;
2583 - }
2584 -#endif
2585 - /* __sh_atomic_model = SH_A_GUSA; */ /* 0, default */
2586 -#endif
2587 - return 0;
2588 -}
2589 --- a/arch/sh/src/atomic.c
2590 +++ /dev/null
2591 @@ -1,158 +0,0 @@
2592 -#ifndef __SH4A__
2593 -
2594 -#include "sh_atomic.h"
2595 -#include "atomic.h"
2596 -#include "libc.h"
2597 -
2598 -static inline unsigned mask()
2599 -{
2600 - unsigned sr;
2601 - __asm__ __volatile__ ( "\n"
2602 - " stc sr,r0 \n"
2603 - " mov r0,%0 \n"
2604 - " or #0xf0,r0 \n"
2605 - " ldc r0,sr \n"
2606 - : "=&r"(sr) : : "memory", "r0" );
2607 - return sr;
2608 -}
2609 -
2610 -static inline void unmask(unsigned sr)
2611 -{
2612 - __asm__ __volatile__ ( "ldc %0,sr" : : "r"(sr) : "memory" );
2613 -}
2614 -
2615 -/* gusa is a hack in the kernel which lets you create a sequence of instructions
2616 - * which will be restarted if the process is preempted in the middle of the
2617 - * sequence. It will do for implementing atomics on non-smp systems. ABI is:
2618 - * r0 = address of first instruction after the atomic sequence
2619 - * r1 = original stack pointer
2620 - * r15 = -1 * length of atomic sequence in bytes
2621 - */
2622 -#define GUSA_CLOBBERS "r0", "r1", "memory"
2623 -#define GUSA_START(mem,old,nop) \
2624 - " .align 2\n" \
2625 - " mova 1f, r0\n" \
2626 - nop \
2627 - " mov r15, r1\n" \
2628 - " mov #(0f-1f), r15\n" \
2629 - "0: mov.l @" mem ", " old "\n"
2630 -/* the target of mova must be 4 byte aligned, so we may need a nop */
2631 -#define GUSA_START_ODD(mem,old) GUSA_START(mem,old,"")
2632 -#define GUSA_START_EVEN(mem,old) GUSA_START(mem,old,"\tnop\n")
2633 -#define GUSA_END(mem,new) \
2634 - " mov.l " new ", @" mem "\n" \
2635 - "1: mov r1, r15\n"
2636 -
2637 -int __sh_cas(volatile int *p, int t, int s)
2638 -{
2639 - if (__sh_atomic_model == SH_A_LLSC) return __sh_cas_llsc(p, t, s);
2640 -
2641 - if (__sh_atomic_model == SH_A_IMASK) {
2642 - unsigned sr = mask();
2643 - int old = *p;
2644 - if (old==t) *p = s;
2645 - unmask(sr);
2646 - return old;
2647 - }
2648 -
2649 - int old;
2650 - __asm__ __volatile__(
2651 - GUSA_START_EVEN("%1", "%0")
2652 - " cmp/eq %0, %2\n"
2653 - " bf 1f\n"
2654 - GUSA_END("%1", "%3")
2655 - : "=&r"(old) : "r"(p), "r"(t), "r"(s) : GUSA_CLOBBERS, "t");
2656 - return old;
2657 -}
2658 -
2659 -int __sh_swap(volatile int *x, int v)
2660 -{
2661 - if (__sh_atomic_model == SH_A_LLSC) return __sh_swap_llsc(x, v);
2662 -
2663 - if (__sh_atomic_model == SH_A_IMASK) {
2664 - unsigned sr = mask();
2665 - int old = *x;
2666 - *x = v;
2667 - unmask(sr);
2668 - return old;
2669 - }
2670 -
2671 - int old;
2672 - __asm__ __volatile__(
2673 - GUSA_START_EVEN("%1", "%0")
2674 - GUSA_END("%1", "%2")
2675 - : "=&r"(old) : "r"(x), "r"(v) : GUSA_CLOBBERS);
2676 - return old;
2677 -}
2678 -
2679 -int __sh_fetch_add(volatile int *x, int v)
2680 -{
2681 - if (__sh_atomic_model == SH_A_LLSC) return __sh_fetch_add_llsc(x, v);
2682 -
2683 - if (__sh_atomic_model == SH_A_IMASK) {
2684 - unsigned sr = mask();
2685 - int old = *x;
2686 - *x = old + v;
2687 - unmask(sr);
2688 - return old;
2689 - }
2690 -
2691 - int old, dummy;
2692 - __asm__ __volatile__(
2693 - GUSA_START_EVEN("%2", "%0")
2694 - " mov %0, %1\n"
2695 - " add %3, %1\n"
2696 - GUSA_END("%2", "%1")
2697 - : "=&r"(old), "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
2698 - return old;
2699 -}
2700 -
2701 -void __sh_store(volatile int *p, int x)
2702 -{
2703 - if (__sh_atomic_model == SH_A_LLSC) return __sh_store_llsc(p, x);
2704 - __asm__ __volatile__(
2705 - " mov.l %1, @%0\n"
2706 - : : "r"(p), "r"(x) : "memory");
2707 -}
2708 -
2709 -void __sh_and(volatile int *x, int v)
2710 -{
2711 - if (__sh_atomic_model == SH_A_LLSC) return __sh_and_llsc(x, v);
2712 -
2713 - if (__sh_atomic_model == SH_A_IMASK) {
2714 - unsigned sr = mask();
2715 - int old = *x;
2716 - *x = old & v;
2717 - unmask(sr);
2718 - return;
2719 - }
2720 -
2721 - int dummy;
2722 - __asm__ __volatile__(
2723 - GUSA_START_ODD("%1", "%0")
2724 - " and %2, %0\n"
2725 - GUSA_END("%1", "%0")
2726 - : "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
2727 -}
2728 -
2729 -void __sh_or(volatile int *x, int v)
2730 -{
2731 - if (__sh_atomic_model == SH_A_LLSC) return __sh_or_llsc(x, v);
2732 -
2733 - if (__sh_atomic_model == SH_A_IMASK) {
2734 - unsigned sr = mask();
2735 - int old = *x;
2736 - *x = old | v;
2737 - unmask(sr);
2738 - return;
2739 - }
2740 -
2741 - int dummy;
2742 - __asm__ __volatile__(
2743 - GUSA_START_ODD("%1", "%0")
2744 - " or %2, %0\n"
2745 - GUSA_END("%1", "%0")
2746 - : "=&r"(dummy) : "r"(x), "r"(v) : GUSA_CLOBBERS);
2747 -}
2748 -
2749 -#endif
2750 --- a/arch/sh/src/sh_atomic.h
2751 +++ /dev/null
2752 @@ -1,15 +0,0 @@
2753 -#ifndef _SH_ATOMIC_H
2754 -#define _SH_ATOMIC_H
2755 -
2756 -#define SH_A_GUSA 0
2757 -#define SH_A_LLSC 1
2758 -#define SH_A_CAS 2
2759 -#if !defined(__SH3__) && !defined(__SH4__)
2760 -#define SH_A_IMASK 3
2761 -#else
2762 -#define SH_A_IMASK -1LL /* unmatchable by unsigned int */
2763 -#endif
2764 -
2765 -extern __attribute__((__visibility__("hidden"))) unsigned __sh_atomic_model;
2766 -
2767 -#endif
2768 --- a/arch/x32/atomic.h
2769 +++ /dev/null
2770 @@ -1,105 +0,0 @@
2771 -#ifndef _INTERNAL_ATOMIC_H
2772 -#define _INTERNAL_ATOMIC_H
2773 -
2774 -#include <stdint.h>
2775 -
2776 -static inline int a_ctz_64(uint64_t x)
2777 -{
2778 - __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
2779 - return x;
2780 -}
2781 -
2782 -static inline int a_ctz_l(unsigned long x)
2783 -{
2784 - __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
2785 - return x;
2786 -}
2787 -
2788 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
2789 -{
2790 - __asm__( "lock ; and %1, %0"
2791 - : "=m"(*p) : "r"(v) : "memory" );
2792 -}
2793 -
2794 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
2795 -{
2796 - __asm__( "lock ; or %1, %0"
2797 - : "=m"(*p) : "r"(v) : "memory" );
2798 -}
2799 -
2800 -static inline void a_or_l(volatile void *p, long v)
2801 -{
2802 - __asm__( "lock ; or %1, %0"
2803 - : "=m"(*(long *)p) : "r"(v) : "memory" );
2804 -}
2805 -
2806 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
2807 -{
2808 - __asm__( "lock ; cmpxchg %3, %1"
2809 - : "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
2810 - return t;
2811 -}
2812 -
2813 -static inline int a_cas(volatile int *p, int t, int s)
2814 -{
2815 - __asm__( "lock ; cmpxchg %3, %1"
2816 - : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
2817 - return t;
2818 -}
2819 -
2820 -static inline void a_or(volatile int *p, int v)
2821 -{
2822 - __asm__( "lock ; or %1, %0"
2823 - : "=m"(*p) : "r"(v) : "memory" );
2824 -}
2825 -
2826 -static inline void a_and(volatile int *p, int v)
2827 -{
2828 - __asm__( "lock ; and %1, %0"
2829 - : "=m"(*p) : "r"(v) : "memory" );
2830 -}
2831 -
2832 -static inline int a_swap(volatile int *x, int v)
2833 -{
2834 - __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
2835 - return v;
2836 -}
2837 -
2838 -static inline int a_fetch_add(volatile int *x, int v)
2839 -{
2840 - __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
2841 - return v;
2842 -}
2843 -
2844 -static inline void a_inc(volatile int *x)
2845 -{
2846 - __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
2847 -}
2848 -
2849 -static inline void a_dec(volatile int *x)
2850 -{
2851 - __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
2852 -}
2853 -
2854 -static inline void a_store(volatile int *p, int x)
2855 -{
2856 - __asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
2857 -}
2858 -
2859 -static inline void a_spin()
2860 -{
2861 - __asm__ __volatile__( "pause" : : : "memory" );
2862 -}
2863 -
2864 -static inline void a_barrier()
2865 -{
2866 - __asm__ __volatile__( "" : : : "memory" );
2867 -}
2868 -
2869 -static inline void a_crash()
2870 -{
2871 - __asm__ __volatile__( "hlt" : : : "memory" );
2872 -}
2873 -
2874 -
2875 -#endif
2876 --- /dev/null
2877 +++ b/arch/x32/atomic_arch.h
2878 @@ -0,0 +1,106 @@
2879 +#define a_ctz_64 a_ctz_64
2880 +static inline int a_ctz_64(uint64_t x)
2881 +{
2882 + __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
2883 + return x;
2884 +}
2885 +
2886 +#define a_ctz_l a_ctz_l
2887 +static inline int a_ctz_l(unsigned long x)
2888 +{
2889 + __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
2890 + return x;
2891 +}
2892 +
2893 +#define a_and_64 a_and_64
2894 +static inline void a_and_64(volatile uint64_t *p, uint64_t v)
2895 +{
2896 + __asm__( "lock ; and %1, %0"
2897 + : "=m"(*p) : "r"(v) : "memory" );
2898 +}
2899 +
2900 +#define a_or_64 a_or_64
2901 +static inline void a_or_64(volatile uint64_t *p, uint64_t v)
2902 +{
2903 + __asm__( "lock ; or %1, %0"
2904 + : "=m"(*p) : "r"(v) : "memory" );
2905 +}
2906 +
2907 +#define a_or_l a_or_l
2908 +static inline void a_or_l(volatile void *p, long v)
2909 +{
2910 + __asm__( "lock ; or %1, %0"
2911 + : "=m"(*(long *)p) : "r"(v) : "memory" );
2912 +}
2913 +
2914 +#define a_cas a_cas
2915 +static inline int a_cas(volatile int *p, int t, int s)
2916 +{
2917 + __asm__( "lock ; cmpxchg %3, %1"
2918 + : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
2919 + return t;
2920 +}
2921 +
2922 +#define a_or a_or
2923 +static inline void a_or(volatile int *p, int v)
2924 +{
2925 + __asm__( "lock ; or %1, %0"
2926 + : "=m"(*p) : "r"(v) : "memory" );
2927 +}
2928 +
2929 +#define a_and a_and
2930 +static inline void a_and(volatile int *p, int v)
2931 +{
2932 + __asm__( "lock ; and %1, %0"
2933 + : "=m"(*p) : "r"(v) : "memory" );
2934 +}
2935 +
2936 +#define a_swap a_swap
2937 +static inline int a_swap(volatile int *x, int v)
2938 +{
2939 + __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
2940 + return v;
2941 +}
2942 +
2943 +#define a_fetch_add a_fetch_add
2944 +static inline int a_fetch_add(volatile int *x, int v)
2945 +{
2946 + __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
2947 + return v;
2948 +}
2949 +
2950 +#define a_inc a_inc
2951 +static inline void a_inc(volatile int *x)
2952 +{
2953 + __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
2954 +}
2955 +
2956 +#define a_dec a_dec
2957 +static inline void a_dec(volatile int *x)
2958 +{
2959 + __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
2960 +}
2961 +
2962 +#define a_store a_store
2963 +static inline void a_store(volatile int *p, int x)
2964 +{
2965 + __asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
2966 +}
2967 +
2968 +#define a_spin a_spin
2969 +static inline void a_spin()
2970 +{
2971 + __asm__ __volatile__( "pause" : : : "memory" );
2972 +}
2973 +
2974 +#define a_barrier a_barrier
2975 +static inline void a_barrier()
2976 +{
2977 + __asm__ __volatile__( "" : : : "memory" );
2978 +}
2979 +
2980 +#define a_crash a_crash
2981 +static inline void a_crash()
2982 +{
2983 + __asm__ __volatile__( "hlt" : : : "memory" );
2984 +}
2985 --- a/arch/x32/pthread_arch.h
2986 +++ b/arch/x32/pthread_arch.h
2987 @@ -7,6 +7,6 @@ static inline struct pthread *__pthread_
2988
2989 #define TP_ADJ(p) (p)
2990
2991 -#define CANCEL_REG_IP 32
2992 +#define MC_PC gregs[REG_RIP]
2993
2994 #define CANARY canary2
2995 --- a/arch/x32/src/syscall_cp_fixup.c
2996 +++ b/arch/x32/src/syscall_cp_fixup.c
2997 @@ -1,8 +1,6 @@
2998 #include <sys/syscall.h>
2999
3000 -#ifdef SHARED
3001 __attribute__((__visibility__("hidden")))
3002 -#endif
3003 long __syscall_cp_internal(volatile void*, long long, long long, long long, long long,
3004 long long, long long, long long);
3005
3006 @@ -14,9 +12,7 @@ struct __timespec_kernel { long long tv_
3007 ts->tv_nsec = __tsc(X)->tv_nsec; \
3008 (X) = (unsigned long)ts; } } while(0)
3009
3010 -#ifdef SHARED
3011 __attribute__((__visibility__("hidden")))
3012 -#endif
3013 long __syscall_cp_asm (volatile void * foo, long long n, long long a1, long long a2, long long a3,
3014 long long a4, long long a5, long long a6)
3015 {
3016 --- a/arch/x86_64/atomic.h
3017 +++ /dev/null
3018 @@ -1,105 +0,0 @@
3019 -#ifndef _INTERNAL_ATOMIC_H
3020 -#define _INTERNAL_ATOMIC_H
3021 -
3022 -#include <stdint.h>
3023 -
3024 -static inline int a_ctz_64(uint64_t x)
3025 -{
3026 - __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
3027 - return x;
3028 -}
3029 -
3030 -static inline int a_ctz_l(unsigned long x)
3031 -{
3032 - __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
3033 - return x;
3034 -}
3035 -
3036 -static inline void a_and_64(volatile uint64_t *p, uint64_t v)
3037 -{
3038 - __asm__( "lock ; and %1, %0"
3039 - : "=m"(*p) : "r"(v) : "memory" );
3040 -}
3041 -
3042 -static inline void a_or_64(volatile uint64_t *p, uint64_t v)
3043 -{
3044 - __asm__( "lock ; or %1, %0"
3045 - : "=m"(*p) : "r"(v) : "memory" );
3046 -}
3047 -
3048 -static inline void a_or_l(volatile void *p, long v)
3049 -{
3050 - __asm__( "lock ; or %1, %0"
3051 - : "=m"(*(long *)p) : "r"(v) : "memory" );
3052 -}
3053 -
3054 -static inline void *a_cas_p(volatile void *p, void *t, void *s)
3055 -{
3056 - __asm__( "lock ; cmpxchg %3, %1"
3057 - : "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
3058 - return t;
3059 -}
3060 -
3061 -static inline int a_cas(volatile int *p, int t, int s)
3062 -{
3063 - __asm__( "lock ; cmpxchg %3, %1"
3064 - : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
3065 - return t;
3066 -}
3067 -
3068 -static inline void a_or(volatile int *p, int v)
3069 -{
3070 - __asm__( "lock ; or %1, %0"
3071 - : "=m"(*p) : "r"(v) : "memory" );
3072 -}
3073 -
3074 -static inline void a_and(volatile int *p, int v)
3075 -{
3076 - __asm__( "lock ; and %1, %0"
3077 - : "=m"(*p) : "r"(v) : "memory" );
3078 -}
3079 -
3080 -static inline int a_swap(volatile int *x, int v)
3081 -{
3082 - __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
3083 - return v;
3084 -}
3085 -
3086 -static inline int a_fetch_add(volatile int *x, int v)
3087 -{
3088 - __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
3089 - return v;
3090 -}
3091 -
3092 -static inline void a_inc(volatile int *x)
3093 -{
3094 - __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
3095 -}
3096 -
3097 -static inline void a_dec(volatile int *x)
3098 -{
3099 - __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
3100 -}
3101 -
3102 -static inline void a_store(volatile int *p, int x)
3103 -{
3104 - __asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
3105 -}
3106 -
3107 -static inline void a_spin()
3108 -{
3109 - __asm__ __volatile__( "pause" : : : "memory" );
3110 -}
3111 -
3112 -static inline void a_barrier()
3113 -{
3114 - __asm__ __volatile__( "" : : : "memory" );
3115 -}
3116 -
3117 -static inline void a_crash()
3118 -{
3119 - __asm__ __volatile__( "hlt" : : : "memory" );
3120 -}
3121 -
3122 -
3123 -#endif
3124 --- /dev/null
3125 +++ b/arch/x86_64/atomic_arch.h
3126 @@ -0,0 +1,107 @@
3127 +#define a_ctz_64 a_ctz_64
3128 +static inline int a_ctz_64(uint64_t x)
3129 +{
3130 + __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
3131 + return x;
3132 +}
3133 +
3134 +#define a_and_64 a_and_64
3135 +static inline void a_and_64(volatile uint64_t *p, uint64_t v)
3136 +{
3137 + __asm__( "lock ; and %1, %0"
3138 + : "=m"(*p) : "r"(v) : "memory" );
3139 +}
3140 +
3141 +#define a_or_64 a_or_64
3142 +static inline void a_or_64(volatile uint64_t *p, uint64_t v)
3143 +{
3144 + __asm__( "lock ; or %1, %0"
3145 + : "=m"(*p) : "r"(v) : "memory" );
3146 +}
3147 +
3148 +#define a_or_l a_or_l
3149 +static inline void a_or_l(volatile void *p, long v)
3150 +{
3151 + __asm__( "lock ; or %1, %0"
3152 + : "=m"(*(long *)p) : "r"(v) : "memory" );
3153 +}
3154 +
3155 +#define a_cas_p a_cas_p
3156 +static inline void *a_cas_p(volatile void *p, void *t, void *s)
3157 +{
3158 + __asm__( "lock ; cmpxchg %3, %1"
3159 + : "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
3160 + return t;
3161 +}
3162 +
3163 +#define a_cas a_cas
3164 +static inline int a_cas(volatile int *p, int t, int s)
3165 +{
3166 + __asm__( "lock ; cmpxchg %3, %1"
3167 + : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
3168 + return t;
3169 +}
3170 +
3171 +#define a_or a_or
3172 +static inline void a_or(volatile int *p, int v)
3173 +{
3174 + __asm__( "lock ; or %1, %0"
3175 + : "=m"(*p) : "r"(v) : "memory" );
3176 +}
3177 +
3178 +#define a_and a_and
3179 +static inline void a_and(volatile int *p, int v)
3180 +{
3181 + __asm__( "lock ; and %1, %0"
3182 + : "=m"(*p) : "r"(v) : "memory" );
3183 +}
3184 +
3185 +#define a_swap a_swap
3186 +static inline int a_swap(volatile int *x, int v)
3187 +{
3188 + __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
3189 + return v;
3190 +}
3191 +
3192 +#define a_fetch_add a_fetch_add
3193 +static inline int a_fetch_add(volatile int *x, int v)
3194 +{
3195 + __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
3196 + return v;
3197 +}
3198 +
3199 +#define a_inc a_inc
3200 +static inline void a_inc(volatile int *x)
3201 +{
3202 + __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
3203 +}
3204 +
3205 +#define a_dec a_dec
3206 +static inline void a_dec(volatile int *x)
3207 +{
3208 + __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
3209 +}
3210 +
3211 +#define a_store a_store
3212 +static inline void a_store(volatile int *p, int x)
3213 +{
3214 + __asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
3215 +}
3216 +
3217 +#define a_spin a_spin
3218 +static inline void a_spin()
3219 +{
3220 + __asm__ __volatile__( "pause" : : : "memory" );
3221 +}
3222 +
3223 +#define a_barrier a_barrier
3224 +static inline void a_barrier()
3225 +{
3226 + __asm__ __volatile__( "" : : : "memory" );
3227 +}
3228 +
3229 +#define a_crash a_crash
3230 +static inline void a_crash()
3231 +{
3232 + __asm__ __volatile__( "hlt" : : : "memory" );
3233 +}
3234 --- a/arch/x86_64/pthread_arch.h
3235 +++ b/arch/x86_64/pthread_arch.h
3236 @@ -7,4 +7,4 @@ static inline struct pthread *__pthread_
3237
3238 #define TP_ADJ(p) (p)
3239
3240 -#define CANCEL_REG_IP 16
3241 +#define MC_PC gregs[REG_RIP]
3242 --- a/configure
3243 +++ b/configure
3244 @@ -9,6 +9,9 @@ VAR=VALUE. See below for descriptions o
3245
3246 Defaults for the options are specified in brackets.
3247
3248 +Configuration:
3249 + --srcdir=DIR source directory [detected]
3250 +
3251 Installation directories:
3252 --prefix=PREFIX main installation prefix [/usr/local/musl]
3253 --exec-prefix=EPREFIX installation prefix for executable files [PREFIX]
3254 @@ -117,6 +120,7 @@ CFLAGS_TRY=
3255 LDFLAGS_AUTO=
3256 LDFLAGS_TRY=
3257 OPTIMIZE_GLOBS=
3258 +srcdir=
3259 prefix=/usr/local/musl
3260 exec_prefix='$(prefix)'
3261 bindir='$(exec_prefix)/bin'
3262 @@ -139,6 +143,7 @@ clang_wrapper=no
3263 for arg ; do
3264 case "$arg" in
3265 --help) usage ;;
3266 +--srcdir=*) srcdir=${arg#*=} ;;
3267 --prefix=*) prefix=${arg#*=} ;;
3268 --exec-prefix=*) exec_prefix=${arg#*=} ;;
3269 --bindir=*) bindir=${arg#*=} ;;
3270 @@ -179,11 +184,23 @@ LIBCC=*) LIBCC=${arg#*=} ;;
3271 esac
3272 done
3273
3274 -for i in prefix exec_prefix bindir libdir includedir syslibdir ; do
3275 +for i in srcdir prefix exec_prefix bindir libdir includedir syslibdir ; do
3276 stripdir $i
3277 done
3278
3279 #
3280 +# Get the source dir for out-of-tree builds
3281 +#
3282 +if test -z "$srcdir" ; then
3283 +srcdir="${0%/configure}"
3284 +stripdir srcdir
3285 +fi
3286 +abs_builddir="$(pwd)" || fail "$0: cannot determine working directory"
3287 +abs_srcdir="$(cd $srcdir && pwd)" || fail "$0: invalid source directory $srcdir"
3288 +test "$abs_srcdir" = "$abs_builddir" && srcdir=.
3289 +test "$srcdir" != "." -a -f Makefile -a ! -h Makefile && fail "$0: Makefile already exists in the working directory"
3290 +
3291 +#
3292 # Get a temp filename we can use
3293 #
3294 i=0
3295 @@ -263,11 +280,11 @@ fi
3296 fi
3297
3298 if test "$gcc_wrapper" = yes ; then
3299 -tools="$tools tools/musl-gcc"
3300 +tools="$tools obj/musl-gcc"
3301 tool_libs="$tool_libs lib/musl-gcc.specs"
3302 fi
3303 if test "$clang_wrapper" = yes ; then
3304 -tools="$tools tools/musl-clang tools/ld.musl-clang"
3305 +tools="$tools obj/musl-clang obj/ld.musl-clang"
3306 fi
3307
3308 #
3309 @@ -321,7 +338,7 @@ __attribute__((__may_alias__))
3310 #endif
3311 x;
3312 EOF
3313 -if $CC $CFLAGS_C99FSE -I./arch/$ARCH -I./include $CPPFLAGS $CFLAGS \
3314 +if $CC $CFLAGS_C99FSE -I$srcdir/arch/$ARCH -I$srcdir/include $CPPFLAGS $CFLAGS \
3315 -c -o /dev/null "$tmpc" >/dev/null 2>&1 ; then
3316 printf "no\n"
3317 else
3318 @@ -330,6 +347,13 @@ CFLAGS_C99FSE="$CFLAGS_C99FSE -D__may_al
3319 fi
3320
3321 #
3322 +# The GNU toolchain defaults to assuming unmarked files need an
3323 +# executable stack, potentially exposing vulnerabilities in programs
3324 +# linked with such object files. Fix this.
3325 +#
3326 +tryflag CFLAGS_C99FSE -Wa,--noexecstack
3327 +
3328 +#
3329 # Check for options to disable stack protector, which needs to be
3330 # disabled for a few early-bootstrap translation units. If not found,
3331 # this is not an error; we assume the toolchain does not do ssp.
3332 @@ -430,11 +454,15 @@ tryflag CFLAGS_AUTO -fno-unwind-tables
3333 tryflag CFLAGS_AUTO -fno-asynchronous-unwind-tables
3334
3335 #
3336 -# The GNU toolchain defaults to assuming unmarked files need an
3337 -# executable stack, potentially exposing vulnerabilities in programs
3338 -# linked with such object files. Fix this.
3339 +# Attempt to put each function and each data object in its own
3340 +# section. This both allows additional size optimizations at link
3341 +# time and works around a dangerous class of compiler/assembler bugs
3342 +# whereby relative address expressions are constant-folded by the
3343 +# assembler even when one or more of the symbols involved is
3344 +# replaceable. See gas pr 18561 and gcc pr 66609, 68178, etc.
3345 #
3346 -tryflag CFLAGS_AUTO -Wa,--noexecstack
3347 +tryflag CFLAGS_AUTO -ffunction-sections
3348 +tryflag CFLAGS_AUTO -fdata-sections
3349
3350 #
3351 # On x86, make sure we don't have incompatible instruction set
3352 @@ -489,7 +517,7 @@ int foo(void) { }
3353 int bar(void) { fp = foo; return foo(); }
3354 EOF
3355 if $CC $CFLAGS_C99FSE $CPPFLAGS $CFLAGS \
3356 - -DSHARED -fPIC -I./src/internal -include vis.h \
3357 + -DSHARED -fPIC -I$srcdir/src/internal -include vis.h \
3358 -nostdlib -shared -Wl,-Bsymbolic-functions \
3359 -o /dev/null "$tmpc" >/dev/null 2>&1 ; then
3360 visibility=yes
3361 @@ -504,6 +532,16 @@ CFLAGS_AUTO="$CFLAGS_AUTO -include vis.h
3362 CFLAGS_AUTO="${CFLAGS_AUTO# }"
3363 fi
3364
3365 +# Reduce space lost to padding for alignment purposes by sorting data
3366 +# objects according to their alignment reqirements. This approximates
3367 +# optimal packing.
3368 +tryldflag LDFLAGS_AUTO -Wl,--sort-section,alignment
3369 +tryldflag LDFLAGS_AUTO -Wl,--sort-common
3370 +
3371 +# When linking shared library, drop dummy weak definitions that were
3372 +# replaced by strong definitions from other translation units.
3373 +tryldflag LDFLAGS_AUTO -Wl,--gc-sections
3374 +
3375 # Some patched GCC builds have these defaults messed up...
3376 tryldflag LDFLAGS_AUTO -Wl,--hash-style=both
3377
3378 @@ -513,6 +551,11 @@ tryldflag LDFLAGS_AUTO -Wl,--hash-style=
3379 # runtime library; implementation error is also a possibility.
3380 tryldflag LDFLAGS_AUTO -Wl,--no-undefined
3381
3382 +# Avoid exporting symbols from compiler runtime libraries. They
3383 +# should be hidden anyway, but some toolchains including old gcc
3384 +# versions built without shared library support and pcc are broken.
3385 +tryldflag LDFLAGS_AUTO -Wl,--exclude-libs=ALL
3386 +
3387 test "$shared" = "no" || {
3388 # Disable dynamic linking if ld is broken and can't do -Bsymbolic-functions
3389 LDFLAGS_DUMMY=
3390 @@ -599,7 +642,7 @@ echo '#include <float.h>' > "$tmpc"
3391 echo '#if LDBL_MANT_DIG == 53' >> "$tmpc"
3392 echo 'typedef char ldcheck[9-(int)sizeof(long double)];' >> "$tmpc"
3393 echo '#endif' >> "$tmpc"
3394 -if $CC $CFLAGS_C99FSE -I./arch/$ARCH -I./include $CPPFLAGS $CFLAGS \
3395 +if $CC $CFLAGS_C99FSE -I$srcdir/arch/$ARCH -I$srcdir/include $CPPFLAGS $CFLAGS \
3396 -c -o /dev/null "$tmpc" >/dev/null 2>&1 ; then
3397 printf "yes\n"
3398 else
3399 @@ -622,6 +665,7 @@ cat << EOF
3400 ARCH = $ARCH
3401 SUBARCH = $SUBARCH
3402 ASMSUBARCH = $ASMSUBARCH
3403 +srcdir = $srcdir
3404 prefix = $prefix
3405 exec_prefix = $exec_prefix
3406 bindir = $bindir
3407 @@ -629,12 +673,14 @@ libdir = $libdir
3408 includedir = $includedir
3409 syslibdir = $syslibdir
3410 CC = $CC
3411 -CFLAGS = $CFLAGS_AUTO $CFLAGS
3412 +CFLAGS = $CFLAGS
3413 +CFLAGS_AUTO = $CFLAGS_AUTO
3414 CFLAGS_C99FSE = $CFLAGS_C99FSE
3415 CFLAGS_MEMOPS = $CFLAGS_MEMOPS
3416 CFLAGS_NOSSP = $CFLAGS_NOSSP
3417 CPPFLAGS = $CPPFLAGS
3418 -LDFLAGS = $LDFLAGS_AUTO $LDFLAGS
3419 +LDFLAGS = $LDFLAGS
3420 +LDFLAGS_AUTO = $LDFLAGS_AUTO
3421 CROSS_COMPILE = $CROSS_COMPILE
3422 LIBCC = $LIBCC
3423 OPTIMIZE_GLOBS = $OPTIMIZE_GLOBS
3424 @@ -648,4 +694,6 @@ test "x$cc_family" = xgcc && echo 'WRAPC
3425 test "x$cc_family" = xclang && echo 'WRAPCC_CLANG = $(CC)'
3426 exec 1>&3 3>&-
3427
3428 +test "$srcdir" = "." || ln -sf $srcdir/Makefile .
3429 +
3430 printf "done\n"
3431 --- a/crt/arm/crti.s
3432 +++ b/crt/arm/crti.s
3433 @@ -1,3 +1,5 @@
3434 +.syntax unified
3435 +
3436 .section .init
3437 .global _init
3438 .type _init,%function
3439 --- a/crt/arm/crtn.s
3440 +++ b/crt/arm/crtn.s
3441 @@ -1,11 +1,9 @@
3442 +.syntax unified
3443 +
3444 .section .init
3445 pop {r0,lr}
3446 - tst lr,#1
3447 - moveq pc,lr
3448 bx lr
3449
3450 .section .fini
3451 pop {r0,lr}
3452 - tst lr,#1
3453 - moveq pc,lr
3454 bx lr
3455 --- a/include/complex.h
3456 +++ b/include/complex.h
3457 @@ -116,7 +116,7 @@ long double creall(long double complex);
3458
3459 #if __STDC_VERSION__ >= 201112L
3460 #if defined(_Imaginary_I)
3461 -#define __CMPLX(x, y, t) ((t)(x) + _Imaginary_I*(t)(y)))
3462 +#define __CMPLX(x, y, t) ((t)(x) + _Imaginary_I*(t)(y))
3463 #elif defined(__clang__)
3464 #define __CMPLX(x, y, t) (+(_Complex t){ (t)(x), (t)(y) })
3465 #else
3466 --- a/include/netinet/tcp.h
3467 +++ b/include/netinet/tcp.h
3468 @@ -41,7 +41,20 @@
3469 #define TCP_CLOSING 11
3470
3471 #if defined(_GNU_SOURCE) || defined(_BSD_SOURCE)
3472 +#define TCPOPT_EOL 0
3473 +#define TCPOPT_NOP 1
3474 +#define TCPOPT_MAXSEG 2
3475 +#define TCPOPT_WINDOW 3
3476 +#define TCPOPT_SACK_PERMITTED 4
3477 +#define TCPOPT_SACK 5
3478 +#define TCPOPT_TIMESTAMP 8
3479 +#define TCPOLEN_SACK_PERMITTED 2
3480 +#define TCPOLEN_WINDOW 3
3481 +#define TCPOLEN_MAXSEG 4
3482 +#define TCPOLEN_TIMESTAMP 10
3483 +
3484 #define SOL_TCP 6
3485 +
3486 #include <sys/types.h>
3487 #include <sys/socket.h>
3488 #include <stdint.h>
3489 --- a/src/env/__init_tls.c
3490 +++ b/src/env/__init_tls.c
3491 @@ -8,9 +8,6 @@
3492 #include "atomic.h"
3493 #include "syscall.h"
3494
3495 -#ifndef SHARED
3496 -static
3497 -#endif
3498 int __init_tp(void *p)
3499 {
3500 pthread_t td = p;
3501 @@ -24,8 +21,6 @@ int __init_tp(void *p)
3502 return 0;
3503 }
3504
3505 -#ifndef SHARED
3506 -
3507 static struct builtin_tls {
3508 char c;
3509 struct pthread pt;
3510 @@ -33,33 +28,40 @@ static struct builtin_tls {
3511 } builtin_tls[1];
3512 #define MIN_TLS_ALIGN offsetof(struct builtin_tls, pt)
3513
3514 -struct tls_image {
3515 - void *image;
3516 - size_t len, size, align;
3517 -} __static_tls;
3518 -
3519 -#define T __static_tls
3520 +static struct tls_module main_tls;
3521
3522 void *__copy_tls(unsigned char *mem)
3523 {
3524 pthread_t td;
3525 - if (!T.image) return mem;
3526 - void **dtv = (void *)mem;
3527 - dtv[0] = (void *)1;
3528 + struct tls_module *p;
3529 + size_t i;
3530 + void **dtv;
3531 +
3532 #ifdef TLS_ABOVE_TP
3533 - mem += sizeof(void *) * 2;
3534 - mem += -((uintptr_t)mem + sizeof(struct pthread)) & (T.align-1);
3535 + dtv = (void **)(mem + libc.tls_size) - (libc.tls_cnt + 1);
3536 +
3537 + mem += -((uintptr_t)mem + sizeof(struct pthread)) & (libc.tls_align-1);
3538 td = (pthread_t)mem;
3539 mem += sizeof(struct pthread);
3540 +
3541 + for (i=1, p=libc.tls_head; p; i++, p=p->next) {
3542 + dtv[i] = mem + p->offset;
3543 + memcpy(dtv[i], p->image, p->len);
3544 + }
3545 #else
3546 + dtv = (void **)mem;
3547 +
3548 mem += libc.tls_size - sizeof(struct pthread);
3549 - mem -= (uintptr_t)mem & (T.align-1);
3550 + mem -= (uintptr_t)mem & (libc.tls_align-1);
3551 td = (pthread_t)mem;
3552 - mem -= T.size;
3553 +
3554 + for (i=1, p=libc.tls_head; p; i++, p=p->next) {
3555 + dtv[i] = mem - p->offset;
3556 + memcpy(dtv[i], p->image, p->len);
3557 + }
3558 #endif
3559 + dtv[0] = (void *)libc.tls_cnt;
3560 td->dtv = td->dtv_copy = dtv;
3561 - dtv[1] = mem;
3562 - memcpy(mem, T.image, T.len);
3563 return td;
3564 }
3565
3566 @@ -69,7 +71,7 @@ typedef Elf32_Phdr Phdr;
3567 typedef Elf64_Phdr Phdr;
3568 #endif
3569
3570 -void __init_tls(size_t *aux)
3571 +static void static_init_tls(size_t *aux)
3572 {
3573 unsigned char *p;
3574 size_t n;
3575 @@ -86,16 +88,24 @@ void __init_tls(size_t *aux)
3576 }
3577
3578 if (tls_phdr) {
3579 - T.image = (void *)(base + tls_phdr->p_vaddr);
3580 - T.len = tls_phdr->p_filesz;
3581 - T.size = tls_phdr->p_memsz;
3582 - T.align = tls_phdr->p_align;
3583 + main_tls.image = (void *)(base + tls_phdr->p_vaddr);
3584 + main_tls.len = tls_phdr->p_filesz;
3585 + main_tls.size = tls_phdr->p_memsz;