RB91X_NAND_ALE, /* Address Latch Enable */
RB91X_NAND_NRW, /* Read/Write. Active low */
RB91X_NAND_NLE, /* Latch Enable. Active low */
+ RB91X_NAND_PDIS, /* Reset Key Poll Disable. Active high */
RB91X_NAND_GPIOS,
};
gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_NLE], lock);
}
+static inline void rb91x_nand_rst_key_poll_disable(struct rb91x_nand_drvdata *drvdata,
+ int disable)
+{
+ gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_PDIS], disable);
+}
+
static int rb91x_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
{
unsigned i;
rb91x_nand_latch_lock(drvdata, 1);
+ rb91x_nand_rst_key_poll_disable(drvdata, 1);
oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE);
out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT);
/* Flush write */
__raw_readl(base + AR71XX_GPIO_REG_OUT);
+ rb91x_nand_rst_key_poll_disable(drvdata, 0);
rb91x_nand_latch_lock(drvdata, 0);
}
gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_READ], 1);
rb91x_nand_latch_lock(drvdata, 1);
+ rb91x_nand_rst_key_poll_disable(drvdata, 1);
/* Save registers */
oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE);
/* Flush write */
__raw_readl(base + AR71XX_GPIO_REG_OUT);
+ rb91x_nand_rst_key_poll_disable(drvdata, 0);
rb91x_nand_latch_lock(drvdata, 0);
/* Disable read mode */
gpios = gpiod_get_array(dev, NULL, GPIOD_OUT_LOW);
if (IS_ERR(gpios)) {
- dev_err(dev, "failed to get gpios: %d\n", (int)gpios);
- return -EINVAL;
+ if (PTR_ERR(gpios) != -EPROBE_DEFER) {
+ dev_err(dev, "failed to get gpios: %d\n",
+ PTR_ERR(gpios));
+ }
+ return PTR_ERR(gpios);
}
if (gpios->ndescs != RB91X_NAND_GPIOS) {