ar8216: enable cpu port to receive arp and broadcast frames for ar8236

[openwrt/staging/chunkeey.git] / target / linux / generic / files / drivers / net / phy / ar8216.h

diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h
index 00d6d7f749d9c7d4dde11a3b702256d5adcc5edc..d43739834e22a443aad65deb6b36c4fc64bd779d 100644 (file)
--- a/target/linux/generic/files/drivers/net/phy/ar8216.h
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.h
@@ -40,6 +40,8 @@
 #define AR8216_REG_FLOOD_MASK          0x002C
 #define   AR8216_FM_UNI_DEST_PORTS     BITS(0, 6)
 #define   AR8216_FM_MULTI_DEST_PORTS   BITS(16, 6)
+#define   AR8236_FM_CPU_BROADCAST_EN   BIT(26)
+#define   AR8236_FM_CPU_BCAST_FWD_EN   BIT(25)
 
 #define AR8216_REG_GLOBAL_CTRL         0x0030
 #define   AR8216_GCTRL_MTU             BITS(0, 11)
@@ -93,6 +95,7 @@
 #define   AR8216_ATU_CTRL_AGE_EN       BIT(17)
 #define   AR8216_ATU_CTRL_AGE_TIME     BITS(0, 16)
 #define   AR8216_ATU_CTRL_AGE_TIME_S   0
+#define   AR8236_ATU_CTRL_RES          BIT(20)
 
 #define AR8216_REG_MIB_FUNC            0x0080
 #define   AR8216_MIB_TIMER             BITS(0, 16)
@@ -164,8 +167,6 @@
 #define AR8216_REG_PORT_RATE(_i)       (AR8216_PORT_OFFSET(_i) + 0x000c)
 #define AR8216_REG_PORT_PRIO(_i)       (AR8216_PORT_OFFSET(_i) + 0x0010)
 
-#define AR8216_REG_PORT_STATS_BASE(_i) (0x19000 + (_i) * 0xa0)
-
 #define AR8216_STATS_RXBROAD           0x00
 #define AR8216_STATS_RXPAUSE           0x04
 #define AR8216_STATS_RXMULTI           0x08
@@ -217,8 +218,6 @@
 #define   AR8236_PORT_VLAN2_VLAN_MODE  BITS(30, 2)
 #define   AR8236_PORT_VLAN2_VLAN_MODE_S        30
 
-#define AR8236_REG_PORT_STATS_BASE(_i) (0x20000 + (_i) * 0x100)
-
 #define AR8236_STATS_RXBROAD           0x00
 #define AR8236_STATS_RXPAUSE           0x04
 #define AR8236_STATS_RXMULTI           0x08
@@ -291,7 +290,6 @@
 
 #define AR8327_NUM_PORTS       7
 #define AR8327_NUM_LEDS                15
-#define AR8327_NUM_PHYS                5
 #define AR8327_PORTS_ALL       0x7f
 #define AR8327_NUM_LED_CTRL_REGS       4
 
@@ -366,6 +364,9 @@
 #define   AR8327_SGMII_CTRL_EN_RX              BIT(2)
 #define   AR8327_SGMII_CTRL_EN_TX              BIT(3)
 
+#define AR8327_REG_EEE_CTRL                    0x100
+#define   AR8327_EEE_CTRL_DISABLE_PHY(_i)      BIT(4 + (_i) * 2)
+
 #define AR8327_REG_PORT_VLAN0(_i)              (0x420 + (_i) * 0x8)
 #define   AR8327_PORT_VLAN0_DEF_SVID           BITS(0, 12)
 #define   AR8327_PORT_VLAN0_DEF_SVID_S         0
@@ -453,8 +454,6 @@
 #define AR8327_REG_PORT_HOL_CTRL1(_i)          (0x974 + (_i) * 0x8)
 #define   AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN   BIT(16)
 
-#define AR8327_REG_PORT_STATS_BASE(_i)         (0x1000 + (_i) * 0x100)
-
 #define AR8337_PAD_MAC06_EXCHANGE_EN           BIT(31)
 
 /* port speed */