ralink: use fe_reset to control all reset

[openwrt/staging/chunkeey.git] / target / linux / ramips / files / drivers / net / ethernet / ralink / ralink_soc_eth.c

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
index 4252ff3ad297b3cfe70c7cd254b16662fd50f54f..28650bbcebfb09e11af1a1e37550393e3ddfe84a 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
@@ -60,6 +60,8 @@
 #define NEXT_TX_DESP_IDX(X)    (((X) + 1) & (NUM_DMA_DESC - 1))
 #define NEXT_RX_DESP_IDX(X)    (((X) + 1) & (NUM_DMA_DESC - 1))
 
+#define SYSC_REG_RSTCTRL       0x34
+
 static int fe_msg_level = -1;
 module_param_named(msg_level, fe_msg_level, int, 0);
 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
@@ -112,6 +114,20 @@ u32 fe_reg_r32(enum fe_reg reg)
        return fe_r32(fe_reg_table[reg]);
 }
 
+void fe_reset(u32 reset_bits)
+{
+       u32 t;
+
+       t = rt_sysc_r32(SYSC_REG_RSTCTRL);
+       t |= reset_bits;
+       rt_sysc_w32(t , SYSC_REG_RSTCTRL);
+       udelay(10);
+
+       t &= ~reset_bits;
+       rt_sysc_w32(t, SYSC_REG_RSTCTRL);
+       udelay(10);
+}
+
 static inline void fe_int_disable(u32 mask)
 {
        fe_reg_w32(fe_reg_r32(FE_REG_FE_INT_ENABLE) & ~mask,