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ramips: Fix amount of MT7621 pins controlled by spi group
authorJohn Crispin <john@openwrt.org>
Mon, 17 Aug 2015 06:15:44 +0000 (06:15 +0000)
committerJohn Crispin <john@openwrt.org>
Mon, 17 Aug 2015 06:15:44 +0000 (06:15 +0000)
commit09851afd33145dc293f0e2900a6f61d0c90f1980
tree7e4c6760fc772305280a151bbc41a40fd0eefda5tree | snapshot
parent9ed654e389efe969785f7b0e4c40c9c63fed9bbecommit | diff
ramips: Fix amount of MT7621 pins controlled by spi group

The PINS conntrolled by the SPI bits in the GPIO_MODE register is always
7 and not 8 for nand mode.

Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46644
target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch diff | blob | history
Staging tree of Christian Lamparter