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ramips: Fix MT7621 pinmux bits for uart3, uart2, mdio
authorJohn Crispin <john@openwrt.org>
Mon, 17 Aug 2015 06:15:49 +0000 (06:15 +0000)
committerJohn Crispin <john@openwrt.org>
Mon, 17 Aug 2015 06:15:49 +0000 (06:15 +0000)
commit87df7da757cf67f61ce5227de42a48f6e3bcd68b
treefd7ca43494efbe7385b46f5a45bd60a424e7f8f8tree | snapshot
parent09851afd33145dc293f0e2900a6f61d0c90f1980commit | diff
ramips: Fix MT7621 pinmux bits for uart3, uart2, mdio

The MT7621 uses a 2 bit wide configuration of the sdhci, spi, mdio, pcie,
wdt, uart2 and uart3 in the GPIO_MODE register. It was correctly done
for sdhci, spi, pcie and wdt, The same has to be done for uart3, uart2
and mdio.

Signed-off-by: Sven Eckelmann <sven@open-mesh.com>
SVN-Revision: 46645
target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch diff | blob | history
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