brcm63xx: fix BCM63268 interrupt register locations for legacy probe

Legacy probe passed the IRQSTAT registers instead of the IRQMASK
registers causing all register accesses to be offset by 16 bytes.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 44575

diff --git a/target/linux/brcm63xx/patches-3.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-3.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
index 51f5d943dba6234e03ad714d4ed9ce3525472ec8..9a0ee204fd6f0f9fa82ba0369572123a2d4ed035 100644 (file)
--- a/target/linux/brcm63xx/patches-3.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
+++ b/target/linux/brcm63xx/patches-3.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
@@ -289,8 +289,8 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                ext_shift = 4;
                break;
 +      case BCM63268_CPU_ID:
-+              periph_bases[0] += PERF_IRQSTAT_63268_REG(0);
-+              periph_bases[1] += PERF_IRQSTAT_63268_REG(1);
++              periph_bases[0] += PERF_IRQMASK_63268_REG(0);
++              periph_bases[1] += PERF_IRQMASK_63268_REG(1);
 +              periph_irq_count = 2;
 +              periph_width = 4;
 +

diff --git a/target/linux/brcm63xx/patches-3.18/339-MIPS-BCM63XX-add-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-3.18/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
index 7c424cc22a7d9d81db727e987dbfc6975d843421..22ceeea1c701ce4780a82702106e3f95ab2145ee 100644 (file)
--- a/target/linux/brcm63xx/patches-3.18/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
+++ b/target/linux/brcm63xx/patches-3.18/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
@@ -289,8 +289,8 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
                ext_shift = 4;
                break;
 +      case BCM63268_CPU_ID:
-+              periph_bases[0] += PERF_IRQSTAT_63268_REG(0);
-+              periph_bases[1] += PERF_IRQSTAT_63268_REG(1);
++              periph_bases[0] += PERF_IRQMASK_63268_REG(0);
++              periph_bases[1] += PERF_IRQMASK_63268_REG(1);
 +              periph_irq_count = 2;
 +              periph_width = 4;
 +