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ipq806x: move mmc specific nodes into v1.0 dtsi
authorPavel Kubelun <be.dissent@gmail.com>
Thu, 18 Jan 2018 14:32:19 +0000 (17:32 +0300)
committerJohn Crispin <john@phrozen.org>
Thu, 24 May 2018 15:24:31 +0000 (17:24 +0200)
These nodes are common for all revisions so put it into SoC v1.0
dtsi file.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
[slh: rebase for kernel v4.14 as well]
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
(cherry picked from commit 7a4f9c5993a726a3009a93dcd6aacb93d2aea6e1)

target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi patch | blob | history
target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi patch | blob | history
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi patch | blob | history
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi patch | blob | history

diff --git a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi
index b400991bd6b05453fa0c8d90c199af3dcbf0ba5d..d38fc29b686551d6221dddbde1aad7bda9e0de52 100644 (file)
--- a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1316,6 +1316,81 @@
 
                        status = "disabled";
                };
+
+               /* Temporary fixed regulator */
+               vsdcc_fixed: vsdcc-regulator {
+                       compatible = "regulator-fixed";
+                       regulator-name = "SDCC Power";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               sdcc1bam:dma@12402000 {
+                       compatible = "qcom,bam-v1.3.0";
+                       reg = <0x12402000 0x8000>;
+                       interrupts = <0 98 0>;
+                       clocks = <&gcc SDC1_H_CLK>;
+                       clock-names = "bam_clk";
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                };
+
+               sdcc3bam:dma@12182000 {
+                       compatible = "qcom,bam-v1.3.0";
+                       reg = <0x12182000 0x8000>;
+                       interrupts = <0 96 0>;
+                       clocks = <&gcc SDC3_H_CLK>;
+                       clock-names = "bam_clk";
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+               };
+
+               amba {
+                       compatible = "arm,amba-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+                       sdcc1: sdcc@12400000 {
+                               status          = "disabled";
+                               compatible      = "arm,pl18x", "arm,primecell";
+                               arm,primecell-periphid = <0x00051180>;
+                               reg             = <0x12400000 0x2000>;
+                               interrupts      = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "cmd_irq";
+                               clocks          = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
+                               clock-names     = "mclk", "apb_pclk";
+                               bus-width       = <8>;
+                               max-frequency   = <96000000>;
+                               non-removable;
+                               cap-sd-highspeed;
+                               cap-mmc-highspeed;
+                               vmmc-supply = <&vsdcc_fixed>;
+                               dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
+                               dma-names = "tx", "rx";
+                       };
+
+                       sdcc3: sdcc@12180000 {
+                               compatible      = "arm,pl18x", "arm,primecell";
+                               arm,primecell-periphid = <0x00051180>;
+                               status          = "disabled";
+                               reg             = <0x12180000 0x2000>;
+                               interrupts      = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "cmd_irq";
+                               clocks          = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
+                               clock-names     = "mclk", "apb_pclk";
+                               bus-width       = <8>;
+                               cap-sd-highspeed;
+                               cap-mmc-highspeed;
+                               max-frequency   = <192000000>;
+                               #mmc-ddr-1_8v;
+                               sd-uhs-sdr104;
+                               sd-uhs-ddr50;
+                               vqmmc-supply = <&vsdcc_fixed>;
+                               dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
+                               dma-names = "tx", "rx";
+                       };
+               };
        };
 
        sfpb_mutex: sfpb-mutex {
diff --git a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi
index 37fb922be0410ade91eff8d4bc9674dc8e66da42..86de2bd8be9f4a107703361a67174ffbf5a3642f 100644 (file)
--- a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -74,80 +74,5 @@
                                };
                        };
                };
-
-               /* Temporary fixed regulator */
-               vsdcc_fixed: vsdcc-regulator {
-                       compatible = "regulator-fixed";
-                       regulator-name = "SDCC Power";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       regulator-always-on;
-               };
-
-               sdcc1bam:dma@12402000 {
-                       compatible = "qcom,bam-v1.3.0";
-                       reg = <0x12402000 0x8000>;
-                       interrupts = <0 98 0>;
-                       clocks = <&gcc SDC1_H_CLK>;
-                       clock-names = "bam_clk";
-                       #dma-cells = <1>;
-                       qcom,ee = <0>;
-                };
-
-               sdcc3bam:dma@12182000 {
-                       compatible = "qcom,bam-v1.3.0";
-                       reg = <0x12182000 0x8000>;
-                       interrupts = <0 96 0>;
-                       clocks = <&gcc SDC3_H_CLK>;
-                       clock-names = "bam_clk";
-                       #dma-cells = <1>;
-                       qcom,ee = <0>;
-               };
-
-               amba {
-                       compatible = "arm,amba-bus";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges;
-                       sdcc1: sdcc@12400000 {
-                               status          = "disabled";
-                               compatible      = "arm,pl18x", "arm,primecell";
-                               arm,primecell-periphid = <0x00051180>;
-                               reg             = <0x12400000 0x2000>;
-                               interrupts      = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
-                               interrupt-names = "cmd_irq";
-                               clocks          = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
-                               clock-names     = "mclk", "apb_pclk";
-                               bus-width       = <8>;
-                               max-frequency   = <96000000>;
-                               non-removable;
-                               cap-sd-highspeed;
-                               cap-mmc-highspeed;
-                               vmmc-supply = <&vsdcc_fixed>;
-                               dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
-                               dma-names = "tx", "rx";
-                       };
-
-                       sdcc3: sdcc@12180000 {
-                               compatible      = "arm,pl18x", "arm,primecell";
-                               arm,primecell-periphid = <0x00051180>;
-                               status          = "disabled";
-                               reg             = <0x12180000 0x2000>;
-                               interrupts      = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
-                               interrupt-names = "cmd_irq";
-                               clocks          = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
-                               clock-names     = "mclk", "apb_pclk";
-                               bus-width       = <8>;
-                               cap-sd-highspeed;
-                               cap-mmc-highspeed;
-                               max-frequency   = <192000000>;
-                               #mmc-ddr-1_8v;
-                               sd-uhs-sdr104;
-                               sd-uhs-ddr50;
-                               vqmmc-supply = <&vsdcc_fixed>;
-                               dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
-                               dma-names = "tx", "rx";
-                       };
-               };
        };
 };
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 90f7a10186b5ec924c45312e02ef605979ef9e51..942e1fd97b0f5e3282d3222a302bf0a738589764 100644 (file)
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1316,6 +1316,81 @@
 
                        status = "disabled";
                };
+
+               /* Temporary fixed regulator */
+               vsdcc_fixed: vsdcc-regulator {
+                       compatible = "regulator-fixed";
+                       regulator-name = "SDCC Power";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               sdcc1bam:dma@12402000 {
+                       compatible = "qcom,bam-v1.3.0";
+                       reg = <0x12402000 0x8000>;
+                       interrupts = <0 98 0>;
+                       clocks = <&gcc SDC1_H_CLK>;
+                       clock-names = "bam_clk";
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                };
+
+               sdcc3bam:dma@12182000 {
+                       compatible = "qcom,bam-v1.3.0";
+                       reg = <0x12182000 0x8000>;
+                       interrupts = <0 96 0>;
+                       clocks = <&gcc SDC3_H_CLK>;
+                       clock-names = "bam_clk";
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+               };
+
+               amba {
+                       compatible = "arm,amba-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+                       sdcc1: sdcc@12400000 {
+                               status          = "disabled";
+                               compatible      = "arm,pl18x", "arm,primecell";
+                               arm,primecell-periphid = <0x00051180>;
+                               reg             = <0x12400000 0x2000>;
+                               interrupts      = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "cmd_irq";
+                               clocks          = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
+                               clock-names     = "mclk", "apb_pclk";
+                               bus-width       = <8>;
+                               max-frequency   = <96000000>;
+                               non-removable;
+                               cap-sd-highspeed;
+                               cap-mmc-highspeed;
+                               vmmc-supply = <&vsdcc_fixed>;
+                               dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
+                               dma-names = "tx", "rx";
+                       };
+
+                       sdcc3: sdcc@12180000 {
+                               compatible      = "arm,pl18x", "arm,primecell";
+                               arm,primecell-periphid = <0x00051180>;
+                               status          = "disabled";
+                               reg             = <0x12180000 0x2000>;
+                               interrupts      = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "cmd_irq";
+                               clocks          = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
+                               clock-names     = "mclk", "apb_pclk";
+                               bus-width       = <8>;
+                               cap-sd-highspeed;
+                               cap-mmc-highspeed;
+                               max-frequency   = <192000000>;
+                               #mmc-ddr-1_8v;
+                               sd-uhs-sdr104;
+                               sd-uhs-ddr50;
+                               vqmmc-supply = <&vsdcc_fixed>;
+                               dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
+                               dma-names = "tx", "rx";
+                       };
+               };
        };
 
        sfpb_mutex: sfpb-mutex {
diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi
index 37fb922be0410ade91eff8d4bc9674dc8e66da42..86de2bd8be9f4a107703361a67174ffbf5a3642f 100644 (file)
--- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -74,80 +74,5 @@
                                };
                        };
                };
-
-               /* Temporary fixed regulator */
-               vsdcc_fixed: vsdcc-regulator {
-                       compatible = "regulator-fixed";
-                       regulator-name = "SDCC Power";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       regulator-always-on;
-               };
-
-               sdcc1bam:dma@12402000 {
-                       compatible = "qcom,bam-v1.3.0";
-                       reg = <0x12402000 0x8000>;
-                       interrupts = <0 98 0>;
-                       clocks = <&gcc SDC1_H_CLK>;
-                       clock-names = "bam_clk";
-                       #dma-cells = <1>;
-                       qcom,ee = <0>;
-                };
-
-               sdcc3bam:dma@12182000 {
-                       compatible = "qcom,bam-v1.3.0";
-                       reg = <0x12182000 0x8000>;
-                       interrupts = <0 96 0>;
-                       clocks = <&gcc SDC3_H_CLK>;
-                       clock-names = "bam_clk";
-                       #dma-cells = <1>;
-                       qcom,ee = <0>;
-               };
-
-               amba {
-                       compatible = "arm,amba-bus";
-                       #address-cells = <1>;
-                       #size-cells = <1>;
-                       ranges;
-                       sdcc1: sdcc@12400000 {
-                               status          = "disabled";
-                               compatible      = "arm,pl18x", "arm,primecell";
-                               arm,primecell-periphid = <0x00051180>;
-                               reg             = <0x12400000 0x2000>;
-                               interrupts      = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
-                               interrupt-names = "cmd_irq";
-                               clocks          = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
-                               clock-names     = "mclk", "apb_pclk";
-                               bus-width       = <8>;
-                               max-frequency   = <96000000>;
-                               non-removable;
-                               cap-sd-highspeed;
-                               cap-mmc-highspeed;
-                               vmmc-supply = <&vsdcc_fixed>;
-                               dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
-                               dma-names = "tx", "rx";
-                       };
-
-                       sdcc3: sdcc@12180000 {
-                               compatible      = "arm,pl18x", "arm,primecell";
-                               arm,primecell-periphid = <0x00051180>;
-                               status          = "disabled";
-                               reg             = <0x12180000 0x2000>;
-                               interrupts      = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
-                               interrupt-names = "cmd_irq";
-                               clocks          = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
-                               clock-names     = "mclk", "apb_pclk";
-                               bus-width       = <8>;
-                               cap-sd-highspeed;
-                               cap-mmc-highspeed;
-                               max-frequency   = <192000000>;
-                               #mmc-ddr-1_8v;
-                               sd-uhs-sdr104;
-                               sd-uhs-ddr50;
-                               vqmmc-supply = <&vsdcc_fixed>;
-                               dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
-                               dma-names = "tx", "rx";
-                       };
-               };
        };
 };
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