target/linux/brcm2708/patches-4.4/0260-clk-bcm2835-expose-raw-clock-registers-via-debugfs.patch

   1 From d1f7529b457f1f1ff248e632ee8218b5d442baa0 Mon Sep 17 00:00:00 2001
   2 From: Martin Sperl <kernel@martin.sperl.org>
   3 Date: Mon, 29 Feb 2016 14:20:15 +0000
   4 Subject: [PATCH 260/381] clk: bcm2835: expose raw clock-registers via debugfs
   5
   6 For debugging purposes under some circumstance
   7 it helps to be able to see the actual clock registers.
   8
   9 E.g: when looking at the clock divider it is helpful to
  10 see what the actual clock divider is.
  11
  12 This patch exposes all the clock registers specific to each
  13 clock/pll/pll-divider via debugfs.
  14
  15 Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
  16 Signed-off-by: Eric Anholt <eric@anholt.net>
  17 Acked-by: Eric Anholt <eric@anholt.net>
  18 (cherry picked from commit 96bf9c69d5729781018a00f08e2ae395ec3346b4)
  19 ---
  20  drivers/clk/bcm/clk-bcm2835.c | 101 ++++++++++++++++++++++++++++++++++++++++++
  21  1 file changed, 101 insertions(+)
  22
  23 --- a/drivers/clk/bcm/clk-bcm2835.c
  24 +++ b/drivers/clk/bcm/clk-bcm2835.c
  25 @@ -37,6 +37,7 @@
  26  #include <linux/clk-provider.h>
  27  #include <linux/clkdev.h>
  28  #include <linux/clk/bcm2835.h>
  29 +#include <linux/debugfs.h>
  30  #include <linux/module.h>
  31  #include <linux/of.h>
  32  #include <linux/platform_device.h>
  33 @@ -313,6 +314,27 @@ static inline u32 cprman_read(struct bcm
  34         return readl(cprman->regs + reg);
  35  }
  36
  37 +static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
  38 +                                 struct debugfs_reg32 *regs, size_t nregs,
  39 +                                 struct dentry *dentry)
  40 +{
  41 +       struct dentry *regdump;
  42 +       struct debugfs_regset32 *regset;
  43 +
  44 +       regset = devm_kzalloc(cprman->dev, sizeof(*regset), GFP_KERNEL);
  45 +       if (!regset)
  46 +               return -ENOMEM;
  47 +
  48 +       regset->regs = regs;
  49 +       regset->nregs = nregs;
  50 +       regset->base = cprman->regs + base;
  51 +
  52 +       regdump = debugfs_create_regset32("regdump", S_IRUGO, dentry,
  53 +                                         regset);
  54 +
  55 +       return regdump ? 0 : -ENOMEM;
  56 +}
  57 +
  58  /*
  59   * These are fixed clocks. They're probably not all root clocks and it may
  60   * be possible to turn them on and off but until this is mapped out better
  61 @@ -1040,6 +1062,36 @@ static int bcm2835_pll_set_rate(struct c
  62         return 0;
  63  }
  64
  65 +static int bcm2835_pll_debug_init(struct clk_hw *hw,
  66 +                                 struct dentry *dentry)
  67 +{
  68 +       struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
  69 +       struct bcm2835_cprman *cprman = pll->cprman;
  70 +       const struct bcm2835_pll_data *data = pll->data;
  71 +       struct debugfs_reg32 *regs;
  72 +
  73 +       regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
  74 +       if (!regs)
  75 +               return -ENOMEM;
  76 +
  77 +       regs[0].name = "cm_ctrl";
  78 +       regs[0].offset = data->cm_ctrl_reg;
  79 +       regs[1].name = "a2w_ctrl";
  80 +       regs[1].offset = data->a2w_ctrl_reg;
  81 +       regs[2].name = "frac";
  82 +       regs[2].offset = data->frac_reg;
  83 +       regs[3].name = "ana0";
  84 +       regs[3].offset = data->ana_reg_base + 0 * 4;
  85 +       regs[4].name = "ana1";
  86 +       regs[4].offset = data->ana_reg_base + 1 * 4;
  87 +       regs[5].name = "ana2";
  88 +       regs[5].offset = data->ana_reg_base + 2 * 4;
  89 +       regs[6].name = "ana3";
  90 +       regs[6].offset = data->ana_reg_base + 3 * 4;
  91 +
  92 +       return bcm2835_debugfs_regset(cprman, 0, regs, 7, dentry);
  93 +}
  94 +
  95  static const struct clk_ops bcm2835_pll_clk_ops = {
  96         .is_prepared = bcm2835_pll_is_on,
  97         .prepare = bcm2835_pll_on,
  98 @@ -1047,6 +1099,7 @@ static const struct clk_ops bcm2835_pll_
  99         .recalc_rate = bcm2835_pll_get_rate,
 100         .set_rate = bcm2835_pll_set_rate,
 101         .round_rate = bcm2835_pll_round_rate,
 102 +       .debug_init = bcm2835_pll_debug_init,
 103  };
 104
 105  struct bcm2835_pll_divider {
 106 @@ -1147,6 +1200,26 @@ static int bcm2835_pll_divider_set_rate(
 107         return 0;
 108  }
 109
 110 +static int bcm2835_pll_divider_debug_init(struct clk_hw *hw,
 111 +                                         struct dentry *dentry)
 112 +{
 113 +       struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw);
 114 +       struct bcm2835_cprman *cprman = divider->cprman;
 115 +       const struct bcm2835_pll_divider_data *data = divider->data;
 116 +       struct debugfs_reg32 *regs;
 117 +
 118 +       regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
 119 +       if (!regs)
 120 +               return -ENOMEM;
 121 +
 122 +       regs[0].name = "cm";
 123 +       regs[0].offset = data->cm_reg;
 124 +       regs[1].name = "a2w";
 125 +       regs[1].offset = data->a2w_reg;
 126 +
 127 +       return bcm2835_debugfs_regset(cprman, 0, regs, 2, dentry);
 128 +}
 129 +
 130  static const struct clk_ops bcm2835_pll_divider_clk_ops = {
 131         .is_prepared = bcm2835_pll_divider_is_on,
 132         .prepare = bcm2835_pll_divider_on,
 133 @@ -1154,6 +1227,7 @@ static const struct clk_ops bcm2835_pll_
 134         .recalc_rate = bcm2835_pll_divider_get_rate,
 135         .set_rate = bcm2835_pll_divider_set_rate,
 136         .round_rate = bcm2835_pll_divider_round_rate,
 137 +       .debug_init = bcm2835_pll_divider_debug_init,
 138  };
 139
 140  /*
 141 @@ -1395,6 +1469,31 @@ static u8 bcm2835_clock_get_parent(struc
 142         return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
 143  }
 144
 145 +static struct debugfs_reg32 bcm2835_debugfs_clock_reg32[] = {
 146 +       {
 147 +               .name = "ctl",
 148 +               .offset = 0,
 149 +       },
 150 +       {
 151 +               .name = "div",
 152 +               .offset = 4,
 153 +       },
 154 +};
 155 +
 156 +static int bcm2835_clock_debug_init(struct clk_hw *hw,
 157 +                                   struct dentry *dentry)
 158 +{
 159 +       struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
 160 +       struct bcm2835_cprman *cprman = clock->cprman;
 161 +       const struct bcm2835_clock_data *data = clock->data;
 162 +
 163 +       return bcm2835_debugfs_regset(
 164 +               cprman, data->ctl_reg,
 165 +               bcm2835_debugfs_clock_reg32,
 166 +               ARRAY_SIZE(bcm2835_debugfs_clock_reg32),
 167 +               dentry);
 168 +}
 169 +
 170  static const struct clk_ops bcm2835_clock_clk_ops = {
 171         .is_prepared = bcm2835_clock_is_on,
 172         .prepare = bcm2835_clock_on,
 173 @@ -1404,6 +1503,7 @@ static const struct clk_ops bcm2835_cloc
 174         .determine_rate = bcm2835_clock_determine_rate,
 175         .set_parent = bcm2835_clock_set_parent,
 176         .get_parent = bcm2835_clock_get_parent,
 177 +       .debug_init = bcm2835_clock_debug_init,
 178  };
 179
 180  static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
 181 @@ -1422,6 +1522,7 @@ static const struct clk_ops bcm2835_vpu_
 182         .determine_rate = bcm2835_clock_determine_rate,
 183         .set_parent = bcm2835_clock_set_parent,
 184         .get_parent = bcm2835_clock_get_parent,
 185 +       .debug_init = bcm2835_clock_debug_init,
 186  };
 187
 188  static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,