brcm2708: update linux 4.4 patches to latest version
[openwrt/staging/dedeckeh.git] / target / linux / brcm2708 / patches-4.4 / 0419-dts-Add-overlay-for-NXP-SC16IS752-Dual-UART-with-SPI.patch
1 From fbbafbb2b4739eb6980f18c78c276ffbee2602db Mon Sep 17 00:00:00 2001
2 From: Erdem MEYDANLI <erdem.meydanli@punica.com.tr>
3 Date: Thu, 30 Jun 2016 21:05:08 +0300
4 Subject: [PATCH] dts: Add overlay for NXP SC16IS752 Dual UART with SPI
5 Interface
6
7 ---
8 arch/arm/boot/dts/overlays/Makefile | 1 +
9 arch/arm/boot/dts/overlays/README | 10 ++++
10 .../boot/dts/overlays/sc16is752-spi1-overlay.dts | 61 ++++++++++++++++++++++
11 3 files changed, 72 insertions(+)
12 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
13
14 --- a/arch/arm/boot/dts/overlays/Makefile
15 +++ b/arch/arm/boot/dts/overlays/Makefile
16 @@ -71,6 +71,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dt
17 dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
18 dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
19 dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
20 +dtbo-$(RPI_DT_OVERLAYS) += sc16is752-spi1.dtbo
21 dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
22 dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
23 dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
24 --- a/arch/arm/boot/dts/overlays/README
25 +++ b/arch/arm/boot/dts/overlays/README
26 @@ -888,6 +888,16 @@ Load: dtoverlay=rra-digidac1-wm8741-au
27 Params: <None>
28
29
30 +Name: sc16is752-spi1
31 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
32 + Enables the chip on SPI1.
33 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
34 + A+, B+, Zero and PI2 B; as well as the Compute Module.
35 +
36 +Load: dtoverlay=sc16is752-spi1,<param>=<val>
37 +Params: int_pin GPIO used for IRQ (default 24)
38 +
39 +
40 Name: sdhost
41 Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
42 N.B. This overlay is designed for situations where the mmc driver is
43 --- /dev/null
44 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
45 @@ -0,0 +1,61 @@
46 +/dts-v1/;
47 +/plugin/;
48 +
49 +/ {
50 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
51 +
52 + fragment@0 {
53 + target = <&gpio>;
54 + __overlay__ {
55 + spi1_pins: spi1_pins {
56 + brcm,pins = <19 20 21>;
57 + brcm,function = <3>; /* alt4 */
58 + };
59 +
60 + spi1_cs_pins: spi1_cs_pins {
61 + brcm,pins = <18>;
62 + brcm,function = <1>; /* output */
63 + };
64 + };
65 + };
66 +
67 + fragment@1 {
68 + target = <&spi1>;
69 + frag1: __overlay__ {
70 + #address-cells = <1>;
71 + #size-cells = <0>;
72 + pinctrl-names = "default";
73 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
74 + cs-gpios = <&gpio 18 1>;
75 + status = "okay";
76 +
77 + sc16is752: sc16is752@0 {
78 + compatible = "nxp,sc16is752";
79 + reg = <0>; /* CE0 */
80 + clocks = <&sc16is752_clk>;
81 + interrupt-parent = <&gpio>;
82 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
83 + #gpio-controller;
84 + #gpio-cells = <2>;
85 + spi-max-frequency = <4000000>;
86 +
87 + sc16is752_clk: sc16is752_clk {
88 + compatible = "fixed-clock";
89 + #clock-cells = <0>;
90 + clock-frequency = <14745600>;
91 + };
92 + };
93 + };
94 + };
95 +
96 + fragment@2 {
97 + target = <&aux>;
98 + __overlay__ {
99 + status = "okay";
100 + };
101 + };
102 +
103 + __overrides__ {
104 + int_pin = <&sc16is752>,"interrupts:0";
105 + };
106 +};