target/linux/brcm63xx/patches-4.9/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch

   1 From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Sun, 16 Jul 2017 12:23:47 +0200
   4 Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support
   5
   6 Enable clkdev lookup support to allow us providing clocks under
   7 different names to devices more easily, so we don't need to care
   8 about clock name clashes anymore.
   9
  10 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
  11 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  12 ---
  13  arch/mips/Kconfig       |   1 +
  14  arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++-----------
  15  2 files changed, 116 insertions(+), 35 deletions(-)
  16
  17 --- a/arch/mips/Kconfig
  18 +++ b/arch/mips/Kconfig
  19 @@ -272,6 +272,7 @@ config BCM63XX
  20         select GPIOLIB
  21         select HAVE_CLK
  22         select MIPS_L1_CACHE_SHIFT_4
  23 +       select CLKDEV_LOOKUP
  24         help
  25          Support for BCM63XX based boards
  26
  27 --- a/arch/mips/bcm63xx/clk.c
  28 +++ b/arch/mips/bcm63xx/clk.c
  29 @@ -10,6 +10,7 @@
  30  #include <linux/mutex.h>
  31  #include <linux/err.h>
  32  #include <linux/clk.h>
  33 +#include <linux/clkdev.h>
  34  #include <linux/delay.h>
  35  #include <bcm63xx_cpu.h>
  36  #include <bcm63xx_io.h>
  37 @@ -355,44 +356,103 @@ long clk_round_rate(struct clk *clk, uns
  38  }
  39  EXPORT_SYMBOL_GPL(clk_round_rate);
  40
  41 -struct clk *clk_get(struct device *dev, const char *id)
  42 -{
  43 -       if (!strcmp(id, "enet0"))
  44 -               return &clk_enet0;
  45 -       if (!strcmp(id, "enet1"))
  46 -               return &clk_enet1;
  47 -       if (!strcmp(id, "enetsw"))
  48 -               return &clk_enetsw;
  49 -       if (!strcmp(id, "ephy"))
  50 -               return &clk_ephy;
  51 -       if (!strcmp(id, "usbh"))
  52 -               return &clk_usbh;
  53 -       if (!strcmp(id, "usbd"))
  54 -               return &clk_usbd;
  55 -       if (!strcmp(id, "spi"))
  56 -               return &clk_spi;
  57 -       if (!strcmp(id, "hsspi"))
  58 -               return &clk_hsspi;
  59 -       if (!strcmp(id, "xtm"))
  60 -               return &clk_xtm;
  61 -       if (!strcmp(id, "periph"))
  62 -               return &clk_periph;
  63 -       if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
  64 -               return &clk_pcm;
  65 -       if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
  66 -               return &clk_ipsec;
  67 -       if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
  68 -               return &clk_pcie;
  69 -       return ERR_PTR(-ENOENT);
  70 -}
  71 -
  72 -EXPORT_SYMBOL(clk_get);
  73 -
  74 -void clk_put(struct clk *clk)
  75 -{
  76 -}
  77 -
  78 -EXPORT_SYMBOL(clk_put);
  79 +static struct clk_lookup bcm3368_clks[] = {
  80 +       /* fixed rate clocks */
  81 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
  82 +       /* gated clocks */
  83 +       CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  84 +       CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  85 +       CLKDEV_INIT(NULL, "ephy", &clk_ephy),
  86 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  87 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
  88 +       CLKDEV_INIT(NULL, "spi", &clk_spi),
  89 +       CLKDEV_INIT(NULL, "pcm", &clk_pcm),
  90 +};
  91 +
  92 +static struct clk_lookup bcm6328_clks[] = {
  93 +       /* fixed rate clocks */
  94 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
  95 +       /* gated clocks */
  96 +       CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  97 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  98 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
  99 +       CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
 100 +       CLKDEV_INIT(NULL, "pcie", &clk_pcie),
 101 +};
 102 +
 103 +static struct clk_lookup bcm6338_clks[] = {
 104 +       /* fixed rate clocks */
 105 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
 106 +       /* gated clocks */
 107 +       CLKDEV_INIT(NULL, "enet0", &clk_enet0),
 108 +       CLKDEV_INIT(NULL, "enet1", &clk_enet1),
 109 +       CLKDEV_INIT(NULL, "ephy", &clk_ephy),
 110 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
 111 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
 112 +       CLKDEV_INIT(NULL, "spi", &clk_spi),
 113 +};
 114 +
 115 +static struct clk_lookup bcm6345_clks[] = {
 116 +       /* fixed rate clocks */
 117 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
 118 +       /* gated clocks */
 119 +       CLKDEV_INIT(NULL, "enet0", &clk_enet0),
 120 +       CLKDEV_INIT(NULL, "enet1", &clk_enet1),
 121 +       CLKDEV_INIT(NULL, "ephy", &clk_ephy),
 122 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
 123 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
 124 +       CLKDEV_INIT(NULL, "spi", &clk_spi),
 125 +};
 126 +
 127 +static struct clk_lookup bcm6348_clks[] = {
 128 +       /* fixed rate clocks */
 129 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
 130 +       /* gated clocks */
 131 +       CLKDEV_INIT(NULL, "enet0", &clk_enet0),
 132 +       CLKDEV_INIT(NULL, "enet1", &clk_enet1),
 133 +       CLKDEV_INIT(NULL, "ephy", &clk_ephy),
 134 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
 135 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
 136 +       CLKDEV_INIT(NULL, "spi", &clk_spi),
 137 +};
 138 +
 139 +static struct clk_lookup bcm6358_clks[] = {
 140 +       /* fixed rate clocks */
 141 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
 142 +       /* gated clocks */
 143 +       CLKDEV_INIT(NULL, "enet0", &clk_enet0),
 144 +       CLKDEV_INIT(NULL, "enet1", &clk_enet1),
 145 +       CLKDEV_INIT(NULL, "ephy", &clk_ephy),
 146 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
 147 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
 148 +       CLKDEV_INIT(NULL, "spi", &clk_spi),
 149 +       CLKDEV_INIT(NULL, "pcm", &clk_pcm),
 150 +};
 151 +
 152 +static struct clk_lookup bcm6362_clks[] = {
 153 +       /* fixed rate clocks */
 154 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
 155 +       /* gated clocks */
 156 +       CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
 157 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
 158 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
 159 +       CLKDEV_INIT(NULL, "spi", &clk_spi),
 160 +       CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
 161 +       CLKDEV_INIT(NULL, "pcie", &clk_pcie),
 162 +       CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
 163 +};
 164 +
 165 +static struct clk_lookup bcm6368_clks[] = {
 166 +       /* fixed rate clocks */
 167 +       CLKDEV_INIT(NULL, "periph", &clk_periph),
 168 +       /* gated clocks */
 169 +       CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
 170 +       CLKDEV_INIT(NULL, "usbh", &clk_usbh),
 171 +       CLKDEV_INIT(NULL, "usbd", &clk_usbd),
 172 +       CLKDEV_INIT(NULL, "spi", &clk_spi),
 173 +       CLKDEV_INIT(NULL, "xtm", &clk_xtm),
 174 +       CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
 175 +};
 176
 177  #define HSSPI_PLL_HZ_6328      133333333
 178  #define HSSPI_PLL_HZ_6362      400000000
 179 @@ -400,11 +460,31 @@ EXPORT_SYMBOL(clk_put);
 180  static int __init bcm63xx_clk_init(void)
 181  {
 182         switch (bcm63xx_get_cpu_id()) {
 183 +       case BCM3368_CPU_ID:
 184 +               clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
 185 +               break;
 186         case BCM6328_CPU_ID:
 187                 clk_hsspi.rate = HSSPI_PLL_HZ_6328;
 188 +               clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
 189 +               break;
 190 +       case BCM6338_CPU_ID:
 191 +               clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks));
 192 +               break;
 193 +       case BCM6345_CPU_ID:
 194 +               clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks));
 195 +               break;
 196 +       case BCM6348_CPU_ID:
 197 +               clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks));
 198 +               break;
 199 +       case BCM6358_CPU_ID:
 200 +               clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
 201                 break;
 202         case BCM6362_CPU_ID:
 203                 clk_hsspi.rate = HSSPI_PLL_HZ_6362;
 204 +               clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
 205 +               break;
 206 +       case BCM6368_CPU_ID:
 207 +               clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
 208                 break;
 209         }
 210