target/linux/generic/pending-4.14/103-MIPS-perf-ath79-Fix-perfcount-IRQ-assignment.patch

   1 From 852a88f35f4b7e5ebb717fed3c3a3330d5ad4336 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
   3 Date: Wed, 10 Apr 2019 16:43:27 +0200
   4 Subject: [PATCH v2] MIPS: perf: ath79: Fix perfcount IRQ assignment
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Currently it's not possible to use perf on ath79 due to genirq flags
  10 mismatch happening on static virtual IRQ 13 which is used for
  11 performance counters hardware IRQ 5.
  12
  13 On TP-Link Archer C7v5:
  14
  15            CPU0
  16   2:          0      MIPS   2  ath9k
  17   4:        318      MIPS   4  19000000.eth
  18   7:      55034      MIPS   7  timer
  19   8:       1236      MISC   3  ttyS0
  20  12:          0      INTC   1  ehci_hcd:usb1
  21  13:          0  gpio-ath79   2  keys
  22  14:          0  gpio-ath79   5  keys
  23  15:         31  AR724X PCI    1  ath10k_pci
  24
  25  $ perf top
  26  genirq: Flags mismatch irq 13. 00014c83 (mips_perf_pmu) vs. 00002003 (keys)
  27
  28 On TP-Link Archer C7v4:
  29
  30          CPU0
  31   4:          0      MIPS   4  19000000.eth
  32   5:       7135      MIPS   5  1a000000.eth
  33   7:      98379      MIPS   7  timer
  34   8:         30      MISC   3  ttyS0
  35  12:      90028      INTC   0  ath9k
  36  13:       5520      INTC   1  ehci_hcd:usb1
  37  14:       4623      INTC   2  ehci_hcd:usb2
  38  15:      32844  AR724X PCI    1  ath10k_pci
  39  16:          0  gpio-ath79  16  keys
  40  23:          0  gpio-ath79  23  keys
  41
  42  $ perf top
  43  genirq: Flags mismatch irq 13. 00014c80 (mips_perf_pmu) vs. 00000080 (ehci_hcd:usb1)
  44
  45 This problem is happening, because currently statically assigned virtual
  46 IRQ 13 for performance counters is not claimed during the initialization
  47 of MIPS PMU during the bootup, so the IRQ subsystem doesn't know, that
  48 this interrupt isn't available for further use.
  49
  50 So this patch fixes the issue by simply booking hardware IRQ 5 for MIPS PMU.
  51
  52 Tested-by: Kevin 'ldir' Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
  53 Signed-off-by: Petr Štetiar <ynezz@true.cz>
  54 ---
  55
  56 Changes since v1:
  57
  58  I've incorporated two comments which I've received on IRC from blogic and
  59  I've also reworded the commit message to match the changes in v2 of this
  60  patch.
  61
  62   * use actual hardware perfcount IRQ 5 instead of the virtual IRQ 13
  63   * dropped the CONFIG_PERF_EVENTS ifdef around irq_create_mapping
  64
  65  arch/mips/ath79/setup.c          |  6 ------
  66  drivers/irqchip/irq-ath79-misc.c | 11 +++++++++++
  67  2 files changed, 11 insertions(+), 6 deletions(-)
  68
  69 --- a/arch/mips/ath79/setup.c
  70 +++ b/arch/mips/ath79/setup.c
  71 @@ -183,12 +183,6 @@ const char *get_system_type(void)
  72         return ath79_sys_type;
  73  }
  74
  75 -int get_c0_perfcount_int(void)
  76 -{
  77 -       return ATH79_MISC_IRQ(5);
  78 -}
  79 -EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
  80 -
  81  unsigned int get_c0_compare_int(void)
  82  {
  83         return CP0_LEGACY_COMPARE_IRQ;
  84 --- a/drivers/irqchip/irq-ath79-misc.c
  85 +++ b/drivers/irqchip/irq-ath79-misc.c
  86 @@ -22,6 +22,15 @@
  87  #define AR71XX_RESET_REG_MISC_INT_ENABLE       4
  88
  89  #define ATH79_MISC_IRQ_COUNT                   32
  90 +#define ATH79_MISC_PERF_IRQ                    5
  91 +
  92 +static int ath79_perfcount_irq;
  93 +
  94 +int get_c0_perfcount_int(void)
  95 +{
  96 +       return ath79_perfcount_irq;
  97 +}
  98 +EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
  99
 100  static void ath79_misc_irq_handler(struct irq_desc *desc)
 101  {
 102 @@ -113,6 +122,8 @@ static void __init ath79_misc_intc_domai
 103  {
 104         void __iomem *base = domain->host_data;
 105
 106 +       ath79_perfcount_irq = irq_create_mapping(domain, ATH79_MISC_PERF_IRQ);
 107 +
 108         /* Disable and clear all interrupts */
 109         __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
 110         __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);