ipq806x: fix 3.18 support
[openwrt/staging/dedeckeh.git] / target / linux / ipq806x / patches-3.18 / 126-add-rpm-to-ipq8064-dts.patch
1 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
2 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
3 @@ -2,6 +2,7 @@
4
5 #include "skeleton.dtsi"
6 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
7 +#include <dt-bindings/mfd/qcom-rpm.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
9 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 @@ -77,6 +78,63 @@
12 ranges;
13 compatible = "simple-bus";
14
15 + rpm@108000 {
16 + compatible = "qcom,rpm-ipq8064";
17 + reg = <0x108000 0x1000>;
18 + qcom,ipc = <&l2cc 0x8 2>;
19 +
20 + interrupts = <0 19 0>,
21 + <0 21 0>,
22 + <0 22 0>;
23 + interrupt-names = "ack",
24 + "err",
25 + "wakeup";
26 +
27 + #address-cells = <1>;
28 + #size-cells = <0>;
29 +
30 + smb208_s1a: smb208-s1a {
31 + compatible = "qcom,rpm-smb208";
32 + reg = <QCOM_RPM_SMB208_S1a>;
33 +
34 + regulator-min-microvolt = <1050000>;
35 + regulator-max-microvolt = <1150000>;
36 +
37 + qcom,switch-mode-frequency = <1200000>;
38 +
39 + };
40 +
41 + smb208_s1b: smb208-s1b {
42 + compatible = "qcom,rpm-smb208";
43 + reg = <QCOM_RPM_SMB208_S1b>;
44 +
45 + regulator-min-microvolt = <1050000>;
46 + regulator-max-microvolt = <1150000>;
47 +
48 + qcom,switch-mode-frequency = <1200000>;
49 + };
50 +
51 + smb208_s2a: smb208-s2a {
52 + compatible = "qcom,rpm-smb208";
53 + reg = <QCOM_RPM_SMB208_S2a>;
54 +
55 + regulator-min-microvolt = < 800000>;
56 + regulator-max-microvolt = <1250000>;
57 +
58 + qcom,switch-mode-frequency = <1200000>;
59 + };
60 +
61 + smb208_s2b: smb208-s2b {
62 + compatible = "qcom,rpm-smb208";
63 + reg = <QCOM_RPM_SMB208_S2b>;
64 +
65 + regulator-min-microvolt = < 800000>;
66 + regulator-max-microvolt = <1250000>;
67 +
68 + qcom,switch-mode-frequency = <1200000>;
69 + };
70 + };
71 +
72 qcom_pinmux: pinmux@800000 {
73 compatible = "qcom,ipq8064-pinctrl";
74 reg = <0x800000 0x4000>;
75 @@ -148,6 +206,12 @@
76 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
77 };
78
79 + l2cc: clock-controller@2011000 {
80 + compatible = "qcom,kpss-gcc", "syscon";
81 + reg = <0x2011000 0x1000>;
82 + clock-output-names = "acpu_l2_aux";
83 + };
84 +
85 saw0: regulator@2089000 {
86 compatible = "qcom,saw2";
87 reg = <0x02089000 0x1000>, <0x02009000 0x1000>;