eba6d7a390a79bf6d421512d66b24a2938bd339f
[openwrt/staging/dedeckeh.git] / target / linux / ramips / patches-4.4 / 0049-watchdog-add-MT7621-support.patch
1 From 77fe64de72317c0e090d82056e7a6a073f2972b4 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 16 Mar 2014 05:24:42 +0000
4 Subject: [PATCH 49/53] watchdog: add MT7621 support
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 drivers/watchdog/Kconfig | 7 ++
9 drivers/watchdog/Makefile | 1 +
10 drivers/watchdog/mt7621_wdt.c | 185 +++++++++++++++++++++++++++++++++++++++++
11 3 files changed, 193 insertions(+)
12 create mode 100644 drivers/watchdog/mt7621_wdt.c
13
14 --- a/drivers/watchdog/Kconfig
15 +++ b/drivers/watchdog/Kconfig
16 @@ -1354,6 +1354,13 @@ config RALINK_WDT
17 help
18 Hardware driver for the Ralink SoC Watchdog Timer.
19
20 +config MT7621_WDT
21 + tristate "Mediatek SoC watchdog"
22 + select WATCHDOG_CORE
23 + depends on SOC_MT7620 || SOC_MT7621
24 + help
25 + Hardware driver for the Ralink SoC Watchdog Timer.
26 +
27 # PARISC Architecture
28
29 # POWERPC Architecture
30 --- a/drivers/watchdog/Makefile
31 +++ b/drivers/watchdog/Makefile
32 @@ -69,6 +69,7 @@ obj-$(CONFIG_MEDIATEK_WATCHDOG) += mtk_w
33 obj-$(CONFIG_DIGICOLOR_WATCHDOG) += digicolor_wdt.o
34 obj-$(CONFIG_LPC18XX_WATCHDOG) += lpc18xx_wdt.o
35 obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
36 +obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
37
38 # AVR32 Architecture
39 obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
40 --- /dev/null
41 +++ b/drivers/watchdog/mt7621_wdt.c
42 @@ -0,0 +1,185 @@
43 +/*
44 + * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
45 + *
46 + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
47 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
48 + *
49 + * This driver was based on: drivers/watchdog/softdog.c
50 + *
51 + * This program is free software; you can redistribute it and/or modify it
52 + * under the terms of the GNU General Public License version 2 as published
53 + * by the Free Software Foundation.
54 + */
55 +
56 +#include <linux/clk.h>
57 +#include <linux/reset.h>
58 +#include <linux/module.h>
59 +#include <linux/kernel.h>
60 +#include <linux/watchdog.h>
61 +#include <linux/miscdevice.h>
62 +#include <linux/moduleparam.h>
63 +#include <linux/platform_device.h>
64 +
65 +#include <asm/mach-ralink/ralink_regs.h>
66 +
67 +#define SYSC_RSTSTAT 0x38
68 +#define WDT_RST_CAUSE BIT(1)
69 +
70 +#define RALINK_WDT_TIMEOUT 30
71 +
72 +#define TIMER_REG_TMRSTAT 0x00
73 +#define TIMER_REG_TMR1LOAD 0x24
74 +#define TIMER_REG_TMR1CTL 0x20
75 +
76 +#define TMR1CTL_ENABLE BIT(7)
77 +#define TMR1CTL_RESTART BIT(9)
78 +
79 +static void __iomem *mt762x_wdt_base;
80 +
81 +static bool nowayout = WATCHDOG_NOWAYOUT;
82 +module_param(nowayout, bool, 0);
83 +MODULE_PARM_DESC(nowayout,
84 + "Watchdog cannot be stopped once started (default="
85 + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
86 +
87 +static inline void rt_wdt_w32(unsigned reg, u32 val)
88 +{
89 + iowrite32(val, mt762x_wdt_base + reg);
90 +}
91 +
92 +static inline u32 rt_wdt_r32(unsigned reg)
93 +{
94 + return ioread32(mt762x_wdt_base + reg);
95 +}
96 +
97 +static int mt762x_wdt_ping(struct watchdog_device *w)
98 +{
99 + rt_wdt_w32(TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
100 +
101 + return 0;
102 +}
103 +
104 +static int mt762x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
105 +{
106 + w->timeout = t;
107 + rt_wdt_w32(TIMER_REG_TMR1LOAD, t * 1000);
108 + mt762x_wdt_ping(w);
109 +
110 + return 0;
111 +}
112 +
113 +static int mt762x_wdt_start(struct watchdog_device *w)
114 +{
115 + u32 t;
116 +
117 + rt_wdt_w32(TIMER_REG_TMR1CTL, 1000 << 16);
118 + mt762x_wdt_set_timeout(w, w->timeout);
119 +
120 + t = rt_wdt_r32(TIMER_REG_TMR1CTL);
121 + t |= TMR1CTL_ENABLE;
122 + rt_wdt_w32(TIMER_REG_TMR1CTL, t);
123 +
124 + return 0;
125 +}
126 +
127 +static int mt762x_wdt_stop(struct watchdog_device *w)
128 +{
129 + u32 t;
130 +
131 + mt762x_wdt_ping(w);
132 +
133 + t = rt_wdt_r32(TIMER_REG_TMR1CTL);
134 + t &= ~TMR1CTL_ENABLE;
135 + rt_wdt_w32(TIMER_REG_TMR1CTL, t);
136 +
137 + return 0;
138 +}
139 +
140 +static int mt762x_wdt_bootcause(void)
141 +{
142 + if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
143 + return WDIOF_CARDRESET;
144 +
145 + return 0;
146 +}
147 +
148 +static struct watchdog_info mt762x_wdt_info = {
149 + .identity = "Mediatek Watchdog",
150 + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
151 +};
152 +
153 +static struct watchdog_ops mt762x_wdt_ops = {
154 + .owner = THIS_MODULE,
155 + .start = mt762x_wdt_start,
156 + .stop = mt762x_wdt_stop,
157 + .ping = mt762x_wdt_ping,
158 + .set_timeout = mt762x_wdt_set_timeout,
159 +};
160 +
161 +static struct watchdog_device mt762x_wdt_dev = {
162 + .info = &mt762x_wdt_info,
163 + .ops = &mt762x_wdt_ops,
164 + .min_timeout = 1,
165 +};
166 +
167 +static int mt762x_wdt_probe(struct platform_device *pdev)
168 +{
169 + struct resource *res;
170 + int ret;
171 +
172 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
173 + mt762x_wdt_base = devm_ioremap_resource(&pdev->dev, res);
174 + if (IS_ERR(mt762x_wdt_base))
175 + return PTR_ERR(mt762x_wdt_base);
176 +
177 + device_reset(&pdev->dev);
178 +
179 + mt762x_wdt_dev.dev = &pdev->dev;
180 + mt762x_wdt_dev.bootstatus = mt762x_wdt_bootcause();
181 + mt762x_wdt_dev.max_timeout = (0xfffful / 1000);
182 + mt762x_wdt_dev.timeout = mt762x_wdt_dev.max_timeout;
183 +
184 + watchdog_set_nowayout(&mt762x_wdt_dev, nowayout);
185 +
186 + ret = watchdog_register_device(&mt762x_wdt_dev);
187 + if (!ret)
188 + dev_info(&pdev->dev, "Initialized\n");
189 +
190 + return 0;
191 +}
192 +
193 +static int mt762x_wdt_remove(struct platform_device *pdev)
194 +{
195 + watchdog_unregister_device(&mt762x_wdt_dev);
196 +
197 + return 0;
198 +}
199 +
200 +static void mt762x_wdt_shutdown(struct platform_device *pdev)
201 +{
202 + mt762x_wdt_stop(&mt762x_wdt_dev);
203 +}
204 +
205 +static const struct of_device_id mt762x_wdt_match[] = {
206 + { .compatible = "mtk,mt7621-wdt" },
207 + {},
208 +};
209 +MODULE_DEVICE_TABLE(of, mt762x_wdt_match);
210 +
211 +static struct platform_driver mt762x_wdt_driver = {
212 + .probe = mt762x_wdt_probe,
213 + .remove = mt762x_wdt_remove,
214 + .shutdown = mt762x_wdt_shutdown,
215 + .driver = {
216 + .name = KBUILD_MODNAME,
217 + .owner = THIS_MODULE,
218 + .of_match_table = mt762x_wdt_match,
219 + },
220 +};
221 +
222 +module_platform_driver(mt762x_wdt_driver);
223 +
224 +MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
225 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
226 +MODULE_LICENSE("GPL v2");
227 +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);