toolchain/gcc: bump to 7.5.0
[openwrt/staging/dedeckeh.git] / toolchain / gcc / patches / 7.5.0 / 931-libffi-fix-MIPS-softfloat-build-issue.patch
1 From c0c62fa4256f805389f16ebfc4a60cf789129b50 Mon Sep 17 00:00:00 2001
2 From: BangLang Huang <banglang.huang@foxmail.com>
3 Date: Wed, 9 Nov 2016 10:36:49 +0800
4 Subject: [PATCH] libffi: fix MIPS softfloat build issue
5
6 Backported from github.com/libffi/libffi#272
7
8 Signed-off-by: BangLang Huang <banglang.huang@foxmail.com>
9 Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
10 ---
11 libffi/src/mips/n32.S | 17 +++++++++++++++++
12 libffi/src/mips/o32.S | 17 +++++++++++++++++
13 2 files changed, 34 insertions(+)
14
15 diff --git a/libffi/src/mips/n32.S b/libffi/src/mips/n32.S
16 index c6985d30a6f..8f25994773c 100644
17 --- a/libffi/src/mips/n32.S
18 +++ b/libffi/src/mips/n32.S
19 @@ -107,6 +107,16 @@ loadregs:
20
21 REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6.
22
23 +#ifdef __mips_soft_float
24 + REG_L a0, 0*FFI_SIZEOF_ARG(t9)
25 + REG_L a1, 1*FFI_SIZEOF_ARG(t9)
26 + REG_L a2, 2*FFI_SIZEOF_ARG(t9)
27 + REG_L a3, 3*FFI_SIZEOF_ARG(t9)
28 + REG_L a4, 4*FFI_SIZEOF_ARG(t9)
29 + REG_L a5, 5*FFI_SIZEOF_ARG(t9)
30 + REG_L a6, 6*FFI_SIZEOF_ARG(t9)
31 + REG_L a7, 7*FFI_SIZEOF_ARG(t9)
32 +#else
33 and t4, t6, ((1<<FFI_FLAG_BITS)-1)
34 REG_L a0, 0*FFI_SIZEOF_ARG(t9)
35 beqz t4, arg1_next
36 @@ -193,6 +203,7 @@ arg7_next:
37 arg8_doublep:
38 l.d $f19, 7*FFI_SIZEOF_ARG(t9)
39 arg8_next:
40 +#endif
41
42 callit:
43 # Load the function pointer
44 @@ -214,6 +225,7 @@ retint:
45 b epilogue
46
47 retfloat:
48 +#ifndef __mips_soft_float
49 bne t6, FFI_TYPE_FLOAT, retdouble
50 jal t9
51 REG_L t4, 4*FFI_SIZEOF_ARG($fp)
52 @@ -272,6 +284,7 @@ retstruct_f_d:
53 s.s $f0, 0(t4)
54 s.d $f2, 8(t4)
55 b epilogue
56 +#endif
57
58 retstruct_d_soft:
59 bne t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
60 @@ -429,6 +442,7 @@ ffi_closure_N32:
61 REG_S a6, A6_OFF2($sp)
62 REG_S a7, A7_OFF2($sp)
63
64 +#ifndef __mips_soft_float
65 # Store all possible float/double registers.
66 s.d $f12, F12_OFF2($sp)
67 s.d $f13, F13_OFF2($sp)
68 @@ -438,6 +452,7 @@ ffi_closure_N32:
69 s.d $f17, F17_OFF2($sp)
70 s.d $f18, F18_OFF2($sp)
71 s.d $f19, F19_OFF2($sp)
72 +#endif
73
74 # Call ffi_closure_mips_inner_N32 to do the real work.
75 LA t9, ffi_closure_mips_inner_N32
76 @@ -458,6 +473,7 @@ cls_retint:
77 b cls_epilogue
78
79 cls_retfloat:
80 +#ifndef __mips_soft_float
81 bne v0, FFI_TYPE_FLOAT, cls_retdouble
82 l.s $f0, V0_OFF2($sp)
83 b cls_epilogue
84 @@ -500,6 +516,7 @@ cls_retstruct_f_d:
85 l.s $f0, V0_OFF2($sp)
86 l.d $f2, V1_OFF2($sp)
87 b cls_epilogue
88 +#endif
89
90 cls_retstruct_small2:
91 REG_L v0, V0_OFF2($sp)
92 diff --git a/libffi/src/mips/o32.S b/libffi/src/mips/o32.S
93 index eb279813a76..1aff4b14814 100644
94 --- a/libffi/src/mips/o32.S
95 +++ b/libffi/src/mips/o32.S
96 @@ -82,13 +82,16 @@ sixteen:
97
98 ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
99
100 +#ifndef __mips_soft_float
101 bnez t0, pass_d # make it quick for int
102 +#endif
103 REG_L a0, 0*FFI_SIZEOF_ARG($sp) # just go ahead and load the
104 REG_L a1, 1*FFI_SIZEOF_ARG($sp) # four regs.
105 REG_L a2, 2*FFI_SIZEOF_ARG($sp)
106 REG_L a3, 3*FFI_SIZEOF_ARG($sp)
107 b call_it
108
109 +#ifndef __mips_soft_float
110 pass_d:
111 bne t0, FFI_ARGS_D, pass_f
112 l.d $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
113 @@ -130,6 +133,7 @@ pass_f_d:
114 # bne t0, FFI_ARGS_F_D, call_it
115 l.s $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
116 l.d $f14, 2*FFI_SIZEOF_ARG($sp) # passing double and float
117 +#endif
118
119 call_it:
120 # Load the function pointer
121 @@ -158,14 +162,23 @@ retfloat:
122 bne t2, FFI_TYPE_FLOAT, retdouble
123 jalr t9
124 REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
125 +#ifndef __mips_soft_float
126 s.s $f0, 0(t0)
127 +#else
128 + REG_S v0, 0(t0)
129 +#endif
130 b epilogue
131
132 retdouble:
133 bne t2, FFI_TYPE_DOUBLE, noretval
134 jalr t9
135 REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
136 +#ifndef __mips_soft_float
137 s.d $f0, 0(t0)
138 +#else
139 + REG_S v1, 4(t0)
140 + REG_S v0, 0(t0)
141 +#endif
142 b epilogue
143
144 noretval:
145 @@ -261,9 +274,11 @@ $LCFI7:
146 li $13, 1 # FFI_O32
147 bne $16, $13, 1f # Skip fp save if FFI_O32_SOFT_FLOAT
148
149 +#ifndef __mips_soft_float
150 # Store all possible float/double registers.
151 s.d $f12, FA_0_0_OFF2($fp)
152 s.d $f14, FA_1_0_OFF2($fp)
153 +#endif
154 1:
155 # Call ffi_closure_mips_inner_O32 to do the work.
156 la t9, ffi_closure_mips_inner_O32
157 @@ -281,6 +296,7 @@ $LCFI7:
158 li $13, 1 # FFI_O32
159 bne $16, $13, 1f # Skip fp restore if FFI_O32_SOFT_FLOAT
160
161 +#ifndef __mips_soft_float
162 li $9, FFI_TYPE_FLOAT
163 l.s $f0, V0_OFF2($fp)
164 beq $8, $9, closure_done
165 @@ -288,6 +304,7 @@ $LCFI7:
166 li $9, FFI_TYPE_DOUBLE
167 l.d $f0, V0_OFF2($fp)
168 beq $8, $9, closure_done
169 +#endif
170 1:
171 REG_L $3, V1_OFF2($fp)
172 REG_L $2, V0_OFF2($fp)
173 --
174 2.16.3
175