ath79: fix qca955x pcie0 memory size

[openwrt/staging/dedeckeh.git] / target / linux / ath79 / dts / qca9557.dtsi

diff --git a/target/linux/ath79/dts/qca9557.dtsi b/target/linux/ath79/dts/qca9557.dtsi
index c3874bc41e754ce3da3f45c0c883c33faf54410f..541aa6916ef4e17241bf1412523b8fed89051a87 100644 (file)
--- a/target/linux/ath79/dts/qca9557.dtsi
+++ b/target/linux/ath79/dts/qca9557.dtsi
@@ -53,8 +53,9 @@
                                status = "disabled";
                        };
 
-                       usb_phy0: usb-phy0 {
+                       usb_phy0: usb-phy0@18030000 {
                                compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
+                               reg = <0x18030000 4>, <0x18030004 4>;
 
                                reset-names = "usb-phy", "usb-suspend-override";
                                resets = <&rst 4>, <&rst 3>;
@@ -64,8 +65,9 @@
                                status = "disabled";
                        };
 
-                       usb_phy1: usb-phy1 {
+                       usb_phy1: usb-phy1@18030010 {
                                compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
+                               reg = <0x18030010 4>, <0x18030014 4>;
 
                                reset-names = "usb-phy", "usb-suspend-override";
                                resets = <&rst2 4>, <&rst2 3>;
@@ -93,7 +95,7 @@
                        pinmux: pinmux@1804002c {
                                compatible = "pinctrl-single";
 
-                               reg = <0x1804002c 0x40>;
+                               reg = <0x1804002c 0x44>;
 
                                #size-cells = <0>;
 
@@ -109,7 +111,7 @@
 
                        pll: pll-controller@18050000 {
                                compatible = "qca,ar9557-pll",
-                                               "qca,qca9550-pll";
+                                               "qca,qca9550-pll", "syscon";
                                reg = <0x18050000 0x50>;
 
                                #clock-cells = <1>;
@@ -130,8 +132,7 @@
 
                        rst: reset-controller@1806001c {
                                compatible = "qca,qca9550-reset",
-                                               "qca,ar7100-reset",
-                                                "simple-bus";
+                                               "qca,ar7100-reset";
                                reg = <0x1806001c 0x4>;
 
                                #reset-cells = <1>;
@@ -185,7 +186,7 @@
                                      <0x180f0000 0x100>,  /* CTRL */
                                      <0x14000000 0x1000>; /* CFG */
                                reg-names = "crp_base", "ctrl_base", "cfg_base";
-                               ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000        /* pci memory */
+                               ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000        /* pci memory */
                                          0x1000000 0 0x00000000 0x0000000 0 0x000001>;         /* io space */
                                interrupt-parent = <&intc2>;
                                interrupts = <1>;
@@ -295,7 +296,10 @@
 &eth0 {
        compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
 
-       pll-data = <0x82000101 0x80000101 0x80001313>;
+       pll-reg = <0 0x28 0>;
+       pll-handle = <&pll>;
+
+       pll-data = <0x16000000 0x00000101 0x00001616>;
        phy-mode = "rgmii";
 
        resets = <&rst 9>;
@@ -310,7 +314,10 @@
 &eth1 {
        compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
 
-       pll-data = <0x82000101 0x80000101 0x80001313>;
+       pll-reg = <0 0x48 0>;
+       pll-handle = <&pll>;
+
+       pll-data = <0x16000000 0x00000101 0x00001616>;
        phy-mode = "sgmii";
 
        resets = <&rst 13>;