made the danube pmu f00 generic

[openwrt/staging/dedeckeh.git] / target / linux / danube / files / arch / mips / danube / dma-core.c

diff --git a/target/linux/danube/files/arch/mips/danube/dma-core.c b/target/linux/danube/files/arch/mips/danube/dma-core.c
index d9520c5503ea8405c57f59471edac3db0aa30e36..7d29dbdc0263333ab9cffbbb3c52fe8a48cbc47c 100644 (file)
--- a/target/linux/danube/files/arch/mips/danube/dma-core.c
+++ b/target/linux/danube/files/arch/mips/danube/dma-core.c
@@ -22,6 +22,7 @@
 #include <asm/danube/danube.h>
 #include <asm/danube/danube_irq.h>
 #include <asm/danube/danube_dma.h>
+#include <asm/danube/danube_pmu.h>
 
 /*25 descriptors for each dma channel,4096/8/20=25.xx*/
 #define DANUBE_DMA_DESCRIPTOR_OFFSET 25
@@ -684,7 +685,7 @@ dma_chip_init(void)
        int i;
 
        // enable DMA from PMU
-       writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_DMA, DANUBE_PMU_PWDCR);
+       danube_pmu_enable(DANUBE_PMU_PWDCR_DMA);
 
        // reset DMA
        writel(readl(DANUBE_DMA_CTRL) | 1, DANUBE_DMA_CTRL);