generic: ar8216: add mib_poll_interval switch attribute

[openwrt/staging/dedeckeh.git] / target / linux / generic / files / drivers / net / phy / ar8327.c

diff --git a/target/linux/generic/files/drivers/net/phy/ar8327.c b/target/linux/generic/files/drivers/net/phy/ar8327.c
index 170c3e43a39fb24952c63c65397a01bb0b94579f..c2964169eb26bbde085100d7ed3699d86a5250df 100644 (file)
--- a/target/linux/generic/files/drivers/net/phy/ar8327.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8327.c
@@ -139,7 +139,7 @@ ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev)
 
        if (!of_property_read_bool(np, "qca,phy-rgmii-en")) {
                pr_err("ar8327: qca,phy-rgmii-en is not specified\n");
-               return -EINVAL;
+               return;
        }
        ar8xxx_phy_dbg_read(priv, phyaddr,
                                AR8327_PHY_MODE_SEL, &phy_val);
@@ -150,7 +150,7 @@ ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev)
        /* set rgmii tx clock delay if needed */
        if (!of_property_read_bool(np, "qca,txclk-delay-en")) {
                pr_err("ar8327: qca,txclk-delay-en is not specified\n");
-               return -EINVAL;
+               return;
        }
        ar8xxx_phy_dbg_read(priv, phyaddr,
                                AR8327_PHY_SYS_CTRL, &phy_val);
@@ -161,7 +161,7 @@ ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev)
        /* set rgmii rx clock delay if needed */
        if (!of_property_read_bool(np, "qca,rxclk-delay-en")) {
                pr_err("ar8327: qca,rxclk-delay-en is not specified\n");
-               return -EINVAL;
+               return;
        }
        ar8xxx_phy_dbg_read(priv, phyaddr,
                                AR8327_PHY_TEST_CTRL, &phy_val);
@@ -662,8 +662,8 @@ ar8327_hw_init(struct ar8xxx_priv *priv)
        if (!priv->chip_data)
                return -ENOMEM;
 
-       if (priv->phy->mdio.dev.of_node)
-               ret = ar8327_hw_config_of(priv, priv->phy->mdio.dev.of_node);
+       if (priv->pdev->of_node)
+               ret = ar8327_hw_config_of(priv, priv->pdev->of_node);
        else
                ret = ar8327_hw_config_pdata(priv,
                                             priv->phy->mdio.dev.platform_data);
@@ -1321,6 +1321,13 @@ static const struct switch_attr ar8327_sw_attr_globals[] = {
                .description = "Reset all MIB counters",
                .set = ar8xxx_sw_set_reset_mibs,
        },
+       {
+               .type = SWITCH_TYPE_INT,
+               .name = "ar8xxx_mib_poll_interval",
+               .description = "MIB polling interval in msecs (0 to disable)",
+               .set = ar8xxx_sw_set_mib_poll_interval,
+               .get = ar8xxx_sw_get_mib_poll_interval
+       },
        {
                .type = SWITCH_TYPE_INT,
                .name = "enable_mirror_rx",
@@ -1457,16 +1464,7 @@ static const struct switch_dev_ops ar8327_sw_ops = {
        .apply_config = ar8327_sw_hw_apply,
        .reset_switch = ar8xxx_sw_reset_switch,
        .get_port_link = ar8xxx_sw_get_port_link,
-/* The following op is disabled as it hogs the CPU and degrades performance.
-   An implementation has been attempted in 4d8a66d but reading MIB data is slow
-   on ar8xxx switches.
-
-   The high CPU load has been traced down to the ar8xxx_reg_wait() call in
-   ar8xxx_mib_op(), which has to usleep_range() till the MIB busy flag set by
-   the request to update the MIB counter is cleared. */
-#if 0
        .get_port_stats = ar8xxx_sw_get_port_stats,
-#endif
 };
 
 const struct ar8xxx_chip ar8327_chip = {
@@ -1501,7 +1499,9 @@ const struct ar8xxx_chip ar8327_chip = {
 
        .num_mibs = ARRAY_SIZE(ar8236_mibs),
        .mib_decs = ar8236_mibs,
-       .mib_func = AR8327_REG_MIB_FUNC
+       .mib_func = AR8327_REG_MIB_FUNC,
+       .mib_rxb_id = AR8236_MIB_RXB_ID,
+       .mib_txb_id = AR8236_MIB_TXB_ID,
 };
 
 const struct ar8xxx_chip ar8337_chip = {
@@ -1537,5 +1537,7 @@ const struct ar8xxx_chip ar8337_chip = {
 
        .num_mibs = ARRAY_SIZE(ar8236_mibs),
        .mib_decs = ar8236_mibs,
-       .mib_func = AR8327_REG_MIB_FUNC
+       .mib_func = AR8327_REG_MIB_FUNC,
+       .mib_rxb_id = AR8236_MIB_RXB_ID,
+       .mib_txb_id = AR8236_MIB_TXB_ID,
 };