7573c963a721892695959d319ce32ede75aa5380
[openwrt/staging/lynxis/omap.git] / target / linux / ipq806x / patches-4.4 / 710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch
1 From abc9f55079169806bcc31f29ec27f7df11c6184c Mon Sep 17 00:00:00 2001
2 From: Ram Chandra Jangir <rjangi@codeaurora.org>
3 Date: Thu, 4 Feb 2016 12:41:56 +0530
4 Subject: [PATCH 2/2] watchdog: qcom: set WDT_BARK_TIME register offset to one
5 second less of bite time
6
7 Currently WDT_BARK_TIME register offset is not configured with bark
8 timeout during wdt_start,and it is taking bark timeout's default value.
9 For some versions of TZ (secure mode) will consider a BARK the same
10 as BITE and reset the board.
11
12 So instead let's just configure the BARK time to be less than a second
13 of the bite timeout so the board does not reset in this scenario
14
15 Change-Id: Ie09850ad7e0470ed721e6924911ca2a81fd9ff8a
16 Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
17 ---
18 drivers/watchdog/qcom-wdt.c | 2 ++
19 1 file changed, 2 insertions(+)
20
21 diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c
22 index 773dcfa..002274a 100644
23 --- a/drivers/watchdog/qcom-wdt.c
24 +++ b/drivers/watchdog/qcom-wdt.c
25 @@ -22,6 +22,7 @@
26
27 #define WDT_RST 0x38
28 #define WDT_EN 0x40
29 +#define WDT_BARK_TIME 0x4C
30 #define WDT_BITE_TIME 0x5C
31
32 struct qcom_wdt {
33 @@ -44,6 +45,7 @@ static int qcom_wdt_start(struct watchdog_device *wdd)
34
35 writel(0, wdt->base + WDT_EN);
36 writel(1, wdt->base + WDT_RST);
37 + writel((wdd->timeout - 1) * wdt->rate, wdt->base + WDT_BARK_TIME);
38 writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME);
39 writel(1, wdt->base + WDT_EN);
40 return 0;
41 --
42 2.7.2
43