4810a91c5ccd47d911e2d05bc7cfed49ad6d84cc
[openwrt/staging/lynxis/omap.git] / target / linux / lantiq / dts / vr9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "lantiq,xway", "lantiq,vr9";
7
8 aliases {
9 serial0 = &asc1;
10 };
11
12 chosen {
13 stdout-path = "serial0:115200n8";
14 };
15
16 cpus {
17 cpu@0 {
18 compatible = "mips,mips34Kc";
19 };
20 };
21
22 memory@0 {
23 device_type = "memory";
24 };
25
26 cputemp@0 {
27 compatible = "lantiq,cputemp";
28 };
29
30 biu@1F800000 {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "lantiq,biu", "simple-bus";
34 reg = <0x1F800000 0x800000>;
35 ranges = <0x0 0x1F800000 0x7FFFFF>;
36
37 icu0: icu@80200 {
38 #interrupt-cells = <1>;
39 interrupt-controller;
40 compatible = "lantiq,icu";
41 reg = <0x80200 0x28
42 0x80228 0x28
43 0x80250 0x28
44 0x80278 0x28
45 0x802a0 0x28>;
46 };
47
48 watchdog@803F0 {
49 compatible = "lantiq,wdt";
50 reg = <0x803F0 0x10>;
51 };
52 };
53
54 sram@1F000000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "lantiq,sram", "simple-bus";
58 reg = <0x1F000000 0x800000>;
59 ranges = <0x0 0x1F000000 0x7FFFFF>;
60
61 eiu0: eiu@101000 {
62 #interrupt-cells = <1>;
63 interrupt-controller;
64 compatible = "lantiq,eiu-xway";
65 reg = <0x101000 0x1000>;
66 interrupt-parent = <&icu0>;
67 lantiq,eiu-irqs = <166 135 66 40 41 42>;
68 };
69
70 pmu0: pmu@102000 {
71 compatible = "lantiq,pmu-xway";
72 reg = <0x102000 0x1000>;
73 };
74
75 cgu0: cgu@103000 {
76 compatible = "lantiq,cgu-xway";
77 reg = <0x103000 0x1000>;
78 };
79
80 dcdc@106a00 {
81 compatible = "lantiq,dcdc-xrx200";
82 reg = <0x106a00 0x200>;
83 };
84
85 vmmc@107000 {
86 status = "disabled";
87 compatible = "lantiq,vmmc-xway";
88 reg = <0x103000 0x400>;
89 interrupt-parent = <&icu0>;
90 interrupts = <150 151 152 153 154 155>;
91 };
92
93 rcu0: rcu@203000 {
94 compatible = "lantiq,rcu-xrx200";
95 reg = <0x203000 0x1000>;
96 /* irq for thermal sensor */
97 interrupt-parent = <&icu0>;
98 interrupts = <115>;
99 };
100
101 xbar0: xbar@400000 {
102 compatible = "lantiq,xbar-xway";
103 reg = <0x400000 0x1000>;
104 };
105 };
106
107 fpi@10000000 {
108 #address-cells = <1>;
109 #size-cells = <1>;
110 compatible = "lantiq,fpi", "simple-bus";
111 ranges = <0x0 0x10000000 0xEEFFFFF>;
112 reg = <0x10000000 0xEF00000>;
113
114 localbus@0 {
115 #address-cells = <2>;
116 #size-cells = <1>;
117 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
118 1 0 0x4000000 0x4000010>; /* addsel1 */
119 compatible = "lantiq,localbus", "simple-bus";
120 };
121
122 gptu@E100A00 {
123 compatible = "lantiq,gptu-xway";
124 reg = <0xE100A00 0x100>;
125 interrupt-parent = <&icu0>;
126 interrupts = <126 127 128 129 130 131>;
127 };
128
129 asc0: serial@E100400 {
130 compatible = "lantiq,asc";
131 reg = <0xE100400 0x400>;
132 interrupt-parent = <&icu0>;
133 interrupts = <104 105 106>;
134 status = "disabled";
135 };
136
137 spi: spi@E100800 {
138 compatible = "lantiq,xrx200-spi";
139 reg = <0xE100800 0x100>;
140 interrupt-parent = <&icu0>;
141 interrupts = <22 23 24>;
142 interrupt-names = "spi_rx", "spi_tx", "spi_err",
143 "spi_frm";
144 #address-cells = <1>;
145 #size-cells = <1>;
146 status = "disabled";
147 };
148
149 gpio: pinmux@E100B10 {
150 compatible = "lantiq,xrx200-pinctrl";
151 #gpio-cells = <2>;
152 gpio-controller;
153 reg = <0xE100B10 0xA0>;
154 };
155
156 asc1: serial@E100C00 {
157 compatible = "lantiq,asc";
158 reg = <0xE100C00 0x400>;
159 interrupt-parent = <&icu0>;
160 interrupts = <112 113 114>;
161 };
162
163 deu@E103100 {
164 compatible = "lantiq,deu-xrx200";
165 reg = <0xE103100 0xf00>;
166 };
167
168 dma0: dma@E104100 {
169 compatible = "lantiq,dma-xway";
170 reg = <0xE104100 0x800>;
171 };
172
173 ebu0: ebu@E105300 {
174 compatible = "lantiq,ebu-xway";
175 reg = <0xE105300 0x100>;
176 };
177
178 ifxhcd@E101000 {
179 status = "disabled";
180 compatible = "lantiq,ifxhcd-xrx200", "lantiq,ifxhcd-xrx200-dwc2";
181 reg = <0xE101000 0x1000
182 0xE120000 0x3f000>;
183 interrupt-parent = <&icu0>;
184 interrupts = <62 91>;
185 };
186
187 ifxhcd@E106000 {
188 status = "disabled";
189 compatible = "lantiq,ifxhcd-xrx200-dwc2";
190 reg = <0xE106000 0x1000>;
191 interrupt-parent = <&icu0>;
192 interrupts = <91>;
193 };
194
195 eth0: eth@E108000 {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 compatible = "lantiq,xrx200-net";
199 reg = < 0xE108000 0x3000 /* switch */
200 0xE10B100 0x70 /* mdio */
201 0xE10B1D8 0x30 /* mii */
202 0xE10B308 0x30 /* pmac */
203 >;
204 interrupt-parent = <&icu0>;
205 interrupts = <75 73 72>;
206 };
207
208 mei@E116000 {
209 compatible = "lantiq,mei-xrx200";
210 reg = <0xE116000 0x9c>;
211 interrupt-parent = <&icu0>;
212 interrupts = <63>;
213 };
214
215 ppe@E234000 {
216 compatible = "lantiq,ppe-xrx200";
217 interrupt-parent = <&icu0>;
218 interrupts = <96>;
219 };
220
221 pcie0: pcie@d900000 {
222 compatible = "lantiq,pcie-xrx200";
223
224 #interrupt-cells = <1>;
225 #size-cells = <2>;
226 #address-cells = <3>;
227
228 interrupt-parent = <&icu0>;
229 interrupts = <161 144>;
230
231 device_type = "pci";
232
233 gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
234 };
235
236 pci0: pci@E105400 {
237 status = "disabled";
238
239 #address-cells = <3>;
240 #size-cells = <2>;
241 #interrupt-cells = <1>;
242 compatible = "lantiq,pci-xway";
243 bus-range = <0x0 0x0>;
244 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
245 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
246 reg = <0x7000000 0x8000 /* config space */
247 0xE105400 0x400>; /* pci bridge */
248 lantiq,bus-clock = <33333333>;
249 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
250 interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
251 req-mask = <0x1>; /* GNT1 */
252 };
253 };
254
255 vdsl {
256 compatible = "lantiq,vdsl-vrx200";
257 };
258 };