target/linux/mvebu/patches-3.10/0142-mtd-nand-pxa3xx-Add-bad-block-handling.patch

   1 From bd428b9b18c2dffb8c9d737e99adfd145822e502 Mon Sep 17 00:00:00 2001
   2 From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
   3 Date: Thu, 14 Nov 2013 18:25:28 -0300
   4 Subject: [PATCH 142/203] mtd: nand: pxa3xx: Add bad block handling
   5
   6 Add support for flash-based bad block table using Marvell's
   7 custom in-flash bad block table layout. The support is enabled
   8 a 'flash_bbt' platform data or device tree parameter.
   9
  10 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
  11 Tested-by: Daniel Mack <zonque@gmail.com>
  12 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
  13 ---
  14  .../devicetree/bindings/mtd/pxa3xx-nand.txt        |  2 ++
  15  drivers/mtd/nand/pxa3xx_nand.c                     | 37 ++++++++++++++++++++++
  16  include/linux/platform_data/mtd-nand-pxa3xx.h      |  3 ++
  17  3 files changed, 42 insertions(+)
  18
  19 --- a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
  20 +++ b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
  21 @@ -13,6 +13,8 @@ Optional properties:
  22   - marvell,nand-keep-config:   Set to keep the NAND controller config as set
  23                                 by the bootloader
  24   - num-cs:                     Number of chipselect lines to usw
  25 + - nand-on-flash-bbt:          boolean to enable on flash bbt option if
  26 +                               not present false
  27
  28  Example:
  29
  30 --- a/drivers/mtd/nand/pxa3xx_nand.c
  31 +++ b/drivers/mtd/nand/pxa3xx_nand.c
  32 @@ -26,6 +26,7 @@
  33  #include <linux/slab.h>
  34  #include <linux/of.h>
  35  #include <linux/of_device.h>
  36 +#include <linux/of_mtd.h>
  37
  38  #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
  39  #define ARCH_HAS_DMA
  40 @@ -241,6 +242,29 @@ static struct pxa3xx_nand_flash builtin_
  41  { "256MiB 16-bit", 0xba20,  64, 2048, 16, 16, 2048, &timing[3] },
  42  };
  43
  44 +static u8 bbt_pattern[] = {'M', 'V', 'B', 'b', 't', '0' };
  45 +static u8 bbt_mirror_pattern[] = {'1', 't', 'b', 'B', 'V', 'M' };
  46 +
  47 +static struct nand_bbt_descr bbt_main_descr = {
  48 +       .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
  49 +               | NAND_BBT_2BIT | NAND_BBT_VERSION,
  50 +       .offs = 8,
  51 +       .len = 6,
  52 +       .veroffs = 14,
  53 +       .maxblocks = 8,         /* Last 8 blocks in each chip */
  54 +       .pattern = bbt_pattern
  55 +};
  56 +
  57 +static struct nand_bbt_descr bbt_mirror_descr = {
  58 +       .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
  59 +               | NAND_BBT_2BIT | NAND_BBT_VERSION,
  60 +       .offs = 8,
  61 +       .len = 6,
  62 +       .veroffs = 14,
  63 +       .maxblocks = 8,         /* Last 8 blocks in each chip */
  64 +       .pattern = bbt_mirror_pattern
  65 +};
  66 +
  67  /* Define a default flash type setting serve as flash detecting only */
  68  #define DEFAULT_FLASH_TYPE (&builtin_flash_types[0])
  69
  70 @@ -1126,6 +1150,18 @@ KEEP_CONFIG:
  71
  72         if (nand_scan_ident(mtd, 1, def))
  73                 return -ENODEV;
  74 +
  75 +       if (pdata->flash_bbt) {
  76 +               /*
  77 +                * We'll use a bad block table stored in-flash and don't
  78 +                * allow writing the bad block marker to the flash.
  79 +                */
  80 +               chip->bbt_options |= NAND_BBT_USE_FLASH |
  81 +                                    NAND_BBT_NO_OOB_BBM;
  82 +               chip->bbt_td = &bbt_main_descr;
  83 +               chip->bbt_md = &bbt_mirror_descr;
  84 +       }
  85 +
  86         /* calculate addressing information */
  87         if (mtd->writesize >= 2048)
  88                 host->col_addr_cycles = 2;
  89 @@ -1320,6 +1356,7 @@ static int pxa3xx_nand_probe_dt(struct p
  90         if (of_get_property(np, "marvell,nand-keep-config", NULL))
  91                 pdata->keep_config = 1;
  92         of_property_read_u32(np, "num-cs", &pdata->num_cs);
  93 +       pdata->flash_bbt = of_get_nand_on_flash_bbt(np);
  94
  95         pdev->dev.platform_data = pdata;
  96
  97 --- a/include/linux/platform_data/mtd-nand-pxa3xx.h
  98 +++ b/include/linux/platform_data/mtd-nand-pxa3xx.h
  99 @@ -55,6 +55,9 @@ struct pxa3xx_nand_platform_data {
 100         /* indicate how many chip selects will be used */
 101         int     num_cs;
 102
 103 +       /* use an flash-based bad block table */
 104 +       bool    flash_bbt;
 105 +
 106         const struct mtd_partition              *parts[NUM_CHIP_SELECT];
 107         unsigned int                            nr_parts[NUM_CHIP_SELECT];
 108