target/linux/mvebu/patches-3.10/0148-mtd-nand-pxa3xx-Move-the-data-buffer-clean-to-prepar.patch

   1 From 1c0aed9b4cfb7bb891aab07a429436d017ac4d7c Mon Sep 17 00:00:00 2001
   2 From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
   3 Date: Thu, 14 Nov 2013 18:25:34 -0300
   4 Subject: [PATCH 148/203] mtd: nand: pxa3xx: Move the data buffer clean to
   5  prepare_start_command()
   6
   7 To allow future support of multiple page reading/writing, move the data
   8 buffer clean out of prepare_set_command().
   9
  10 This is done to prevent the data buffer from being cleaned on every command
  11 preparation, when a multiple command sequence is implemented to read/write
  12 pages larger than the FIFO size (2 KiB).
  13
  14 Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
  15 Tested-by: Daniel Mack <zonque@gmail.com>
  16 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
  17 ---
  18  drivers/mtd/nand/pxa3xx_nand.c | 21 ++++++++++++++++-----
  19  1 file changed, 16 insertions(+), 5 deletions(-)
  20
  21 --- a/drivers/mtd/nand/pxa3xx_nand.c
  22 +++ b/drivers/mtd/nand/pxa3xx_nand.c
  23 @@ -609,6 +609,9 @@ static void set_command_address(struct p
  24
  25  static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
  26  {
  27 +       struct pxa3xx_nand_host *host = info->host[info->cs];
  28 +       struct mtd_info *mtd = host->mtd;
  29 +
  30         /* reset data and oob column point to handle data */
  31         info->buf_start         = 0;
  32         info->buf_count         = 0;
  33 @@ -633,6 +636,19 @@ static void prepare_start_command(struct
  34                 info->ndcb2 = 0;
  35                 break;
  36         }
  37 +
  38 +       /*
  39 +        * If we are about to issue a read command, or about to set
  40 +        * the write address, then clean the data buffer.
  41 +        */
  42 +       if (command == NAND_CMD_READ0 ||
  43 +           command == NAND_CMD_READOOB ||
  44 +           command == NAND_CMD_SEQIN) {
  45 +
  46 +               info->buf_count = mtd->writesize + mtd->oobsize;
  47 +               memset(info->data_buff, 0xFF, info->buf_count);
  48 +       }
  49 +
  50  }
  51
  52  static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
  53 @@ -674,16 +690,11 @@ static int prepare_set_command(struct px
  54                         info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
  55
  56                 set_command_address(info, mtd->writesize, column, page_addr);
  57 -               info->buf_count = mtd->writesize + mtd->oobsize;
  58 -               memset(info->data_buff, 0xFF, info->buf_count);
  59                 break;
  60
  61         case NAND_CMD_SEQIN:
  62
  63                 set_command_address(info, mtd->writesize, column, page_addr);
  64 -               info->buf_count = mtd->writesize + mtd->oobsize;
  65 -               memset(info->data_buff, 0xFF, info->buf_count);
  66 -
  67                 break;
  68
  69         case NAND_CMD_PAGEPROG: