e5fd41e44f2044093c3ba56bf0e5912935f4677e
[openwrt/staging/mkresin.git] / target / linux / lantiq / files-4.14 / arch / mips / boot / dts / FRITZ3370-REV2.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
5
6 / {
7 compatible = "avm,fritz3370-rev2", "lantiq,xway", "lantiq,vr9";
8 model = "AVM FRITZ!Box 3370 Rev. 2";
9
10 chosen {
11 bootargs = "console=ttyLTQ0,115200";
12 };
13
14 aliases {
15 led-boot = &power_green;
16 led-failsafe = &power_red;
17 led-running = &power_green;
18 led-upgrade = &power_green;
19
20 led-dsl = &dsl;
21 led-internet = &info_green;
22 led-wifi = &wifi;
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x8000000>;
28 };
29
30 gpio-poweroff {
31 compatible = "gpio-poweroff";
32 gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
33 };
34
35 gpio-keys-polled {
36 compatible = "gpio-keys-polled";
37 #address-cells = <1>;
38 #size-cells = <0>;
39 poll-interval = <100>;
40
41 power {
42 label = "power";
43 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
44 linux,code = <KEY_POWER>;
45 };
46
47 wifi {
48 label = "wlan";
49 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
50 linux,code = <KEY_WLAN>;
51 };
52 };
53
54 gpio-leds {
55 compatible = "gpio-leds";
56
57 power_green: power {
58 label = "fritz3370:green:power";
59 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
60 default-state = "keep";
61 };
62
63 power_red: power2 {
64 label = "fritz3370:red:power";
65 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
66 };
67
68 info_red {
69 label = "fritz3370:red:info";
70 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
71 };
72
73 wifi: wifi {
74 label = "fritz3370:green:wlan";
75 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
76 };
77
78 dsl: dsl {
79 label = "fritz3370:green:dsl";
80 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
81 };
82
83 lan {
84 label = "fritz3370:green:lan";
85 gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
86 };
87
88 info_green: info_green {
89 label = "fritz3370:green:info";
90 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
91 };
92 };
93
94 usb0_vbus: regulator-usb0-vbus {
95 compatible = "regulator-fixed";
96
97 regulator-name = "USB0_VBUS";
98
99 regulator-min-microvolt = <5000000>;
100 regulator-max-microvolt = <5000000>;
101
102 gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
103 enable-active-high;
104 };
105
106 usb1_vbus: regulator-usb1-vbus {
107 compatible = "regulator-fixed";
108
109 regulator-name = "USB1_VBUS";
110
111 regulator-min-microvolt = <5000000>;
112 regulator-max-microvolt = <5000000>;
113
114 gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
115 enable-active-high;
116 };
117 };
118
119 &eth0 {
120 lan: interface@0 {
121 compatible = "lantiq,xrx200-pdi";
122 #address-cells = <1>;
123 #size-cells = <0>;
124 reg = <0>;
125 lantiq,switch;
126
127 ethernet@0 {
128 compatible = "lantiq,xrx200-pdi-port";
129 reg = <0>;
130 phy-mode = "rgmii";
131 phy-handle = <&phy0>;
132 gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
133 };
134
135 ethernet@1 {
136 compatible = "lantiq,xrx200-pdi-port";
137 reg = <1>;
138 phy-mode = "rgmii";
139 phy-handle = <&phy1>;
140 gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
141 };
142
143 ethernet@2 {
144 compatible = "lantiq,xrx200-pdi-port";
145 reg = <2>;
146 phy-mode = "gmii";
147 phy-handle = <&phy11>;
148 };
149
150 ethernet@4 {
151 compatible = "lantiq,xrx200-pdi-port";
152 reg = <4>;
153 phy-mode = "gmii";
154 phy-handle = <&phy13>;
155 };
156 };
157
158 mdio@0 {
159 #address-cells = <1>;
160 #size-cells = <0>;
161 compatible = "lantiq,xrx200-mdio";
162 reg = <0>;
163
164 phy0: ethernet-phy@0 {
165 reg = <0x0>;
166 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
167 };
168
169 phy1: ethernet-phy@1 {
170 reg = <0x1>;
171 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
172 };
173
174 phy11: ethernet-phy@11 {
175 reg = <0x11>;
176 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
177 };
178
179 phy13: ethernet-phy@13 {
180 reg = <0x13>;
181 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
182 };
183 };
184 };
185
186 &gphy0 {
187 lantiq,gphy-mode = <GPHY_MODE_GE>;
188 };
189
190 &gphy1 {
191 lantiq,gphy-mode = <GPHY_MODE_GE>;
192 };
193
194 &gpio {
195 pinctrl-names = "default";
196 pinctrl-0 = <&state_default>;
197
198 state_default: pinmux {
199 mdio {
200 lantiq,groups = "mdio";
201 lantiq,function = "mdio";
202 };
203
204 nand {
205 lantiq,groups = "nand cle", "nand ale",
206 "nand rd", "nand cs1", "nand rdy";
207 lantiq,function = "ebu";
208 lantiq,pull = <1>;
209 };
210
211 phy-rst {
212 lantiq,pins = "io37", "io44";
213 lantiq,pull = <0>;
214 lantiq,open-drain = <0>;
215 lantiq,output = <1>;
216 };
217
218 pcie-rst {
219 lantiq,pins = "io21";
220 lantiq,pull = <0>;
221 lantiq,output = <1>;
222 };
223 };
224
225 pins_spi_default: pins_spi_default {
226 spi_in {
227 lantiq,groups = "spi_di";
228 lantiq,function = "spi";
229 };
230
231 spi_out {
232 lantiq,groups = "spi_do", "spi_clk",
233 "spi_cs4";
234 lantiq,function = "spi";
235 lantiq,output = <1>;
236 };
237 };
238 };
239
240 &pcie0 {
241 gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
242
243 pcie@0 {
244 reg = <0 0 0 0 0>;
245 #interrupt-cells = <1>;
246 #size-cells = <2>;
247 #address-cells = <3>;
248 device_type = "pci";
249
250 wifi@0,0 {
251 compatible = "pci0,0";
252 reg = <0 0 0 0 0>;
253 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
254 };
255 };
256 };
257
258 &spi {
259 status = "okay";
260
261 pinctrl-names = "default";
262 pinctrl-0 = <&pins_spi_default>;
263
264 m25p80@4 {
265 #address-cells = <1>;
266 #size-cells = <1>;
267 compatible = "jedec,spi-nor";
268 reg = <4 0>;
269 spi-max-frequency = <1000000>;
270
271 urlader: partition@0 {
272 reg = <0x0 0x20000>;
273 label = "urlader";
274 read-only;
275 };
276
277 partition@20000 {
278 reg = <0x20000 0x10000>;
279 label = "tffs (1)";
280 read-only;
281 };
282
283 partition@30000 {
284 reg = <0x30000 0x10000>;
285 label = "tffs (2)";
286 read-only;
287 };
288 };
289 };
290
291 &usb_phy0 {
292 status = "okay";
293 };
294
295 &usb_phy1 {
296 status = "okay";
297 };
298
299 &usb0 {
300 status = "okay";
301 vbus-supply = <&usb0_vbus>;
302 };
303
304 &usb1 {
305 status = "okay";
306 vbus-supply = <&usb1_vbus>;
307 };