lantiq: make AVM FRITZ!Box naming consistent
[openwrt/staging/mkresin.git] / target / linux / lantiq / files-4.14 / arch / mips / boot / dts / FRITZ7360SL.dts
1 /dts-v1/;
2
3 #include "vr9.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
7
8 / {
9 compatible = "avm,fritz7360sl", "lantiq,xway", "lantiq,vr9";
10 model = "AVM FRITZ!Box 7360 SL";
11
12 chosen {
13 bootargs = "console=ttyLTQ0,115200";
14 };
15
16 aliases {
17 led-boot = &power_green;
18 led-failsafe = &power_red;
19 led-running = &power_green;
20 led-upgrade = &power_green;
21
22 led-dsl = &info_green;
23 led-wifi = &wifi;
24 };
25
26 memory@0 {
27 reg = <0x0 0x8000000>;
28 };
29
30 gpio-keys-polled {
31 compatible = "gpio-keys-polled";
32 #address-cells = <1>;
33 #size-cells = <0>;
34 poll-interval = <100>;
35 dect {
36 label = "dect";
37 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
38 linux,code = <KEY_PHONE>;
39 };
40 wifi {
41 label = "wifi";
42 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
43 linux,code = <KEY_WLAN>;
44 };
45 };
46
47 gpio-leds {
48 compatible = "gpio-leds";
49
50 power_green: power {
51 label = "fritz7360sl:green:power";
52 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
53 default-state = "keep";
54 };
55 power_red: power2 {
56 label = "fritz7360sl:red:power";
57 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
58 };
59 info_red {
60 label = "fritz7360sl:red:info";
61 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
62 };
63 info_green: info_green {
64 label = "fritz7360sl:green:info";
65 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
66 };
67 wifi: wifi {
68 label = "fritz7360sl:green:wlan";
69 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
70 };
71 dect {
72 label = "fritz7360sl:green:dect";
73 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
74 };
75 };
76 };
77
78 &eth0 {
79 lan: interface@0 {
80 compatible = "lantiq,xrx200-pdi";
81 #address-cells = <1>;
82 #size-cells = <0>;
83 reg = <0>;
84 mtd-mac-address = <&urlader 0xa91>;
85 mtd-mac-address-increment = <(-2)>;
86 lantiq,switch;
87
88 ethernet@0 {
89 compatible = "lantiq,xrx200-pdi-port";
90 reg = <0>;
91 phy-mode = "rmii";
92 phy-handle = <&phy0>;
93 };
94 ethernet@1 {
95 compatible = "lantiq,xrx200-pdi-port";
96 reg = <1>;
97 phy-mode = "rmii";
98 phy-handle = <&phy1>;
99 };
100 ethernet@2 {
101 compatible = "lantiq,xrx200-pdi-port";
102 reg = <2>;
103 phy-mode = "gmii";
104 phy-handle = <&phy11>;
105 };
106 ethernet@3 {
107 compatible = "lantiq,xrx200-pdi-port";
108 reg = <4>;
109 phy-mode = "gmii";
110 phy-handle = <&phy13>;
111 };
112 };
113
114 mdio@0 {
115 #address-cells = <1>;
116 #size-cells = <0>;
117 compatible = "lantiq,xrx200-mdio";
118 reg = <0>;
119
120 phy0: ethernet-phy@0 {
121 reg = <0x00>;
122 compatible = "ethernet-phy-ieee802.3-c22";
123 reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
124 };
125 phy1: ethernet-phy@1 {
126 reg = <0x01>;
127 compatible = "ethernet-phy-ieee802.3-c22";
128 reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
129 };
130 phy11: ethernet-phy@11 {
131 reg = <0x11>;
132 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
133 };
134 phy13: ethernet-phy@13 {
135 reg = <0x13>;
136 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
137 };
138 };
139 };
140
141 &gphy0 {
142 lantiq,gphy-mode = <GPHY_MODE_GE>;
143 };
144
145 &gphy1 {
146 lantiq,gphy-mode = <GPHY_MODE_GE>;
147 };
148
149 &gpio {
150 pinctrl-names = "default";
151 pinctrl-0 = <&state_default>;
152
153 state_default: pinmux {
154 mdio {
155 lantiq,groups = "mdio";
156 lantiq,function = "mdio";
157 };
158 phy-rst {
159 lantiq,pins = "io37", "io44";
160 lantiq,pull = <0>;
161 lantiq,open-drain;
162 lantiq,output = <1>;
163 };
164 pcie-rst {
165 lantiq,pins = "io38";
166 lantiq,pull = <0>;
167 lantiq,output = <1>;
168 };
169 };
170 };
171
172 &localbus {
173 nor@0 {
174 compatible = "lantiq,nor";
175 bank-width = <2>;
176 reg = <0 0x0 0x1000000>;
177 #address-cells = <1>;
178 #size-cells = <1>;
179
180 partitions {
181 compatible = "fixed-partitions";
182 #address-cells = <1>;
183 #size-cells = <1>;
184 urlader: partition@0 {
185 label = "urlader";
186 reg = <0x00000 0x20000>;
187 read-only;
188 };
189
190 partition@20000 {
191 label = "firmware";
192 reg = <0x20000 0xf60000>;
193 };
194
195 partition@f80000 {
196 label = "tffs (1)";
197 reg = <0xf80000 0x40000>;
198 read-only;
199 };
200
201 partition@fc0000 {
202 label = "tffs (2)";
203 reg = <0xfc0000 0x40000>;
204 read-only;
205 };
206 };
207 };
208 };
209
210 &pcie0 {
211 pcie@0 {
212 reg = <0 0 0 0 0>;
213 #interrupt-cells = <1>;
214 #size-cells = <2>;
215 #address-cells = <3>;
216 device_type = "pci";
217
218 wifi@168c,002e {
219 compatible = "pci168c,002e";
220 reg = <0 0 0 0 0>;
221 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
222 };
223 };
224 };
225
226 &usb_phy0 {
227 status = "okay";
228 };
229
230 &usb_phy1 {
231 status = "okay";
232 };
233
234 &usb0 {
235 status = "okay";
236 };
237
238 &usb1 {
239 status = "okay";
240 };