lantiq: dts: drop falcon clock node
[openwrt/staging/mkresin.git] / target / linux / lantiq / files-4.14 / arch / mips / boot / dts / FRITZ7360SL.dts
1 /dts-v1/;
2
3 #include "vr9.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
7
8 / {
9 compatible = "avm,fritz7360sl", "lantiq,xway", "lantiq,vr9";
10 model = "AVM FRITZ!Box 7360 SL";
11
12 chosen {
13 bootargs = "console=ttyLTQ0,115200";
14 };
15
16 aliases {
17 led-boot = &power_green;
18 led-failsafe = &power_red;
19 led-running = &power_green;
20 led-upgrade = &power_green;
21
22 led-dsl = &info_green;
23 led-wifi = &wifi;
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x0 0x8000000>;
29 };
30
31 gpio-keys-polled {
32 compatible = "gpio-keys-polled";
33 poll-interval = <100>;
34 dect {
35 label = "dect";
36 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
37 linux,code = <KEY_PHONE>;
38 };
39 wifi {
40 label = "wifi";
41 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
42 linux,code = <KEY_WLAN>;
43 };
44 };
45
46 gpio-leds {
47 compatible = "gpio-leds";
48
49 power_green: power {
50 label = "fritz7360sl:green:power";
51 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
52 default-state = "keep";
53 };
54 power_red: power2 {
55 label = "fritz7360sl:red:power";
56 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
57 };
58 info_red {
59 label = "fritz7360sl:red:info";
60 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
61 };
62 info_green: info_green {
63 label = "fritz7360sl:green:info";
64 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
65 };
66 wifi: wifi {
67 label = "fritz7360sl:green:wlan";
68 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
69 };
70 dect {
71 label = "fritz7360sl:green:dect";
72 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
73 };
74 };
75 };
76
77 &eth0 {
78 lan: interface@0 {
79 compatible = "lantiq,xrx200-pdi";
80 #address-cells = <1>;
81 #size-cells = <0>;
82 reg = <0>;
83 mtd-mac-address = <&urlader 0xa91>;
84 mtd-mac-address-increment = <(-2)>;
85 lantiq,switch;
86
87 ethernet@0 {
88 compatible = "lantiq,xrx200-pdi-port";
89 reg = <0>;
90 phy-mode = "rmii";
91 phy-handle = <&phy0>;
92 };
93 ethernet@1 {
94 compatible = "lantiq,xrx200-pdi-port";
95 reg = <1>;
96 phy-mode = "rmii";
97 phy-handle = <&phy1>;
98 };
99 ethernet@2 {
100 compatible = "lantiq,xrx200-pdi-port";
101 reg = <2>;
102 phy-mode = "gmii";
103 phy-handle = <&phy11>;
104 };
105 ethernet@3 {
106 compatible = "lantiq,xrx200-pdi-port";
107 reg = <4>;
108 phy-mode = "gmii";
109 phy-handle = <&phy13>;
110 };
111 };
112
113 mdio {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 compatible = "lantiq,xrx200-mdio";
117
118 phy0: ethernet-phy@0 {
119 reg = <0x00>;
120 compatible = "ethernet-phy-ieee802.3-c22";
121 reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
122 };
123 phy1: ethernet-phy@1 {
124 reg = <0x01>;
125 compatible = "ethernet-phy-ieee802.3-c22";
126 reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
127 };
128 phy11: ethernet-phy@11 {
129 reg = <0x11>;
130 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
131 };
132 phy13: ethernet-phy@13 {
133 reg = <0x13>;
134 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
135 };
136 };
137 };
138
139 &gphy0 {
140 lantiq,gphy-mode = <GPHY_MODE_GE>;
141 };
142
143 &gphy1 {
144 lantiq,gphy-mode = <GPHY_MODE_GE>;
145 };
146
147 &gpio {
148 pinctrl-names = "default";
149 pinctrl-0 = <&state_default>;
150
151 state_default: pinmux {
152 mdio {
153 lantiq,groups = "mdio";
154 lantiq,function = "mdio";
155 };
156 phy-rst {
157 lantiq,pins = "io37", "io44";
158 lantiq,pull = <0>;
159 lantiq,open-drain;
160 lantiq,output = <1>;
161 };
162 pcie-rst {
163 lantiq,pins = "io38";
164 lantiq,pull = <0>;
165 lantiq,output = <1>;
166 };
167 };
168 };
169
170 &localbus {
171 nor@0 {
172 compatible = "lantiq,nor";
173 bank-width = <2>;
174 reg = <0 0x0 0x1000000>;
175
176 partitions {
177 #address-cells = <1>;
178 #size-cells = <1>;
179 compatible = "fixed-partitions";
180
181 urlader: partition@0 {
182 label = "urlader";
183 reg = <0x00000 0x20000>;
184 read-only;
185 };
186
187 partition@20000 {
188 label = "firmware";
189 reg = <0x20000 0xf60000>;
190 };
191
192 partition@f80000 {
193 label = "tffs (1)";
194 reg = <0xf80000 0x40000>;
195 read-only;
196 };
197
198 partition@fc0000 {
199 label = "tffs (2)";
200 reg = <0xfc0000 0x40000>;
201 read-only;
202 };
203 };
204 };
205 };
206
207 &pcie0 {
208 pcie@0 {
209 reg = <0 0 0 0 0>;
210 #interrupt-cells = <1>;
211 #size-cells = <2>;
212 #address-cells = <3>;
213
214 wifi@168c,002e {
215 compatible = "pci168c,002e";
216 reg = <0 0 0 0 0>;
217 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
218 };
219 };
220 };
221
222 &usb_phy0 {
223 status = "okay";
224 };
225
226 &usb_phy1 {
227 status = "okay";
228 };
229
230 &usb0 {
231 status = "okay";
232 };
233
234 &usb1 {
235 status = "okay";
236 };