target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF3.dts

   1 /dts-v1/;
   2
   3 #include "P2812HNUFX.dtsi"
   4
   5 / {
   6         compatible = "zyxel,p-2812hnu-f3", "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
   7         model = "ZyXEL P-2812HNU-F3";
   8
   9         fpi@10000000 {
  10                 localbus@0 {
  11                         nor-boot@0 {
  12                                 compatible = "lantiq,nor";
  13                                 bank-width = <2>;
  14                                 reg = <0 0x0 0x800000>;
  15                                 #address-cells = <1>;
  16                                 #size-cells = <1>;
  17
  18                                 partitions {
  19                                         compatible = "fixed-partitions";
  20                                         #address-cells = <1>;
  21                                         #size-cells = <1>;
  22
  23                                         partition@0 {
  24                                                 label = "uboot";
  25                                                 reg = <0x0 0x50000>;
  26                                                 read-only;
  27                                         };
  28                                         partition@50000 {
  29                                                 label = "uboot-env";
  30                                                 reg = <0x50000 0x10000>;
  31                                         };
  32                                         partition@60000 {
  33                                                 label = "unused";
  34                                                 reg = <0x60000 0x7a0000>;
  35                                         };
  36                                 };
  37                         };
  38
  39                         nand-parts@0 {
  40                                 compatible = "lantiq,nand-xway";
  41                                 lantiq,cs = <1>;
  42                                 bank-width = <2>;
  43                                 reg = <1 0x0 0x2000000>;
  44                                 #address-cells = <1>;
  45                                 #size-cells = <1>;
  46
  47                                 partition@0 {
  48                                         label = "kernel";
  49                                         reg = <0x0 0x200000>;
  50                                 };
  51                                 partition@200000 {
  52                                         label = "ubi";
  53                                         reg = <0x200000 0x7e00000>;
  54                                 };
  55                         };
  56                 };
  57         };
  58 };
  59
  60 &pci0 {
  61         wifi@1814,3092 {
  62                 compatible = "pci1814,3092";
  63                 reg = <0x7000 0 0 0 0>;
  64                 ralink,eeprom = "RT3092.eeprom";
  65         };
  66 };