lantiq: dts: drop falcon clock node
[openwrt/staging/mkresin.git] / target / linux / lantiq / files-4.14 / arch / mips / boot / dts / TDW89X0.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
5
6 / {
7 compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
8
9 chosen {
10 bootargs = "console=ttyLTQ0,115200";
11 };
12
13 aliases {
14 /* the power led can't be controlled, use the wps led instead */
15 led-boot = &wps;
16 led-failsafe = &wps;
17
18 led-dsl = &dsl;
19 led-internet = &internet;
20 led-wifi = &wifi;
21 led-usb = &led_usb0;
22 led-usb2 = &led_usb2;
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x4000000>;
28 };
29
30 gpio-keys-polled {
31 compatible = "gpio-keys-polled";
32 poll-interval = <100>;
33 reset {
34 label = "reset";
35 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_RESTART>;
37 };
38
39 wifi {
40 label = "wifi";
41 gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
42 linux,code = <KEY_RFKILL>;
43 linux,input-type = <EV_SW>;
44 };
45
46 wps {
47 label = "wps";
48 gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_WPS_BUTTON>;
50 };
51 };
52
53 gpio-leds {
54 compatible = "gpio-leds";
55 /*
56 power is not controllable via gpio
57 */
58 dsl: dsl {
59 label = "tdw89x0:green:dsl";
60 gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
61 };
62 internet: internet {
63 label = "tdw89x0:green:internet";
64 gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
65 };
66
67 led_usb0: usb0 {
68 label = "tdw89x0:green:usb";
69 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
70 };
71 led_usb2: usb2 {
72 label = "tdw89x0:green:usb2";
73 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
74 };
75 wps: wps {
76 label = "tdw89x0:green:wps";
77 gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
78 };
79 };
80
81 wifi-leds {
82 compatible = "gpio-leds";
83
84 wifi: wifi {
85 label = "tdw89x0:green:wifi";
86 gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
87 };
88 };
89
90
91 usb_vbus: regulator-usb-vbus {
92 compatible = "regulator-fixed";
93
94 regulator-name = "USB_VBUS";
95
96 regulator-min-microvolt = <5000000>;
97 regulator-max-microvolt = <5000000>;
98
99 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
100 enable-active-high;
101 };
102 };
103
104 &eth0 {
105 lan: interface@0 {
106 compatible = "lantiq,xrx200-pdi";
107 #address-cells = <1>;
108 #size-cells = <0>;
109 reg = <0>;
110 mtd-mac-address = <&ath9k_cal 0xf100>;
111 lantiq,switch;
112
113 ethernet@0 {
114 compatible = "lantiq,xrx200-pdi-port";
115 reg = <0>;
116 phy-mode = "rgmii";
117 phy-handle = <&phy0>;
118 // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
119 };
120 ethernet@5 {
121 compatible = "lantiq,xrx200-pdi-port";
122 reg = <5>;
123 phy-mode = "rgmii";
124 phy-handle = <&phy5>;
125 };
126 ethernet@2 {
127 compatible = "lantiq,xrx200-pdi-port";
128 reg = <2>;
129 phy-mode = "gmii";
130 phy-handle = <&phy11>;
131 };
132 ethernet@3 {
133 compatible = "lantiq,xrx200-pdi-port";
134 reg = <4>;
135 phy-mode = "gmii";
136 phy-handle = <&phy13>;
137 };
138 };
139
140 mdio {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "lantiq,xrx200-mdio";
144
145 phy0: ethernet-phy@0 {
146 reg = <0x0>;
147 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
148 };
149 phy5: ethernet-phy@5 {
150 reg = <0x5>;
151 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
152 };
153 phy11: ethernet-phy@11 {
154 reg = <0x11>;
155 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
156 };
157 phy13: ethernet-phy@13 {
158 reg = <0x13>;
159 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
160 };
161 };
162 };
163
164 &gphy0 {
165 lantiq,gphy-mode = <GPHY_MODE_GE>;
166 };
167
168 &gphy1 {
169 lantiq,gphy-mode = <GPHY_MODE_GE>;
170 };
171
172 &gpio {
173 pinctrl-names = "default";
174 pinctrl-0 = <&state_default>;
175
176 state_default: pinmux {
177 mdio {
178 lantiq,groups = "mdio";
179 lantiq,function = "mdio";
180 };
181 gphy-leds {
182 lantiq,groups = "gphy0 led1", "gphy1 led1";
183 lantiq,function = "gphy";
184 lantiq,pull = <2>;
185 lantiq,open-drain = <0>;
186 lantiq,output = <1>;
187 };
188 phy-rst {
189 lantiq,pins = "io42";
190 lantiq,pull = <0>;
191 lantiq,open-drain = <0>;
192 lantiq,output = <1>;
193 };
194 pcie-rst {
195 lantiq,pins = "io38";
196 lantiq,pull = <0>;
197 lantiq,output = <1>;
198 };
199 };
200 pins_spi_default: pins_spi_default {
201 spi_in {
202 lantiq,groups = "spi_di";
203 lantiq,function = "spi";
204 };
205 spi_out {
206 lantiq,groups = "spi_do", "spi_clk",
207 "spi_cs4";
208 lantiq,function = "spi";
209 lantiq,output = <1>;
210 };
211 };
212 };
213
214 &pcie0 {
215 pcie@0 {
216 reg = <0 0 0 0 0>;
217 #interrupt-cells = <1>;
218 #size-cells = <2>;
219 #address-cells = <3>;
220
221 ath9k: wifi@168c,002e {
222 compatible = "pci168c,002e";
223 reg = <0 0 0 0 0>;
224 #gpio-cells = <2>;
225 gpio-controller;
226 qca,no-eeprom;
227 qca,disable-5ghz;
228 mtd-mac-address = <&ath9k_cal 0xf100>;
229 mtd-mac-address-increment = <2>;
230 };
231 };
232 };
233
234 &spi {
235 status = "okay";
236
237 pinctrl-names = "default";
238 pinctrl-0 = <&pins_spi_default>;
239
240 m25p80@4 {
241 compatible = "jedec,spi-nor";
242 reg = <4>;
243 spi-max-frequency = <33250000>;
244 m25p,fast-read;
245
246 partitions {
247 compatible = "fixed-partitions";
248 #address-cells = <1>;
249 #size-cells = <1>;
250
251 partition@0 {
252 reg = <0x0 0x20000>;
253 label = "u-boot";
254 read-only;
255 };
256
257 partition@20000 {
258 reg = <0x20000 0x7a0000>;
259 label = "firmware";
260 };
261
262 partition@7c0000 {
263 reg = <0x7c0000 0x10000>;
264 label = "config";
265 read-only;
266 };
267
268 ath9k_cal: partition@7d0000 {
269 reg = <0x7d0000 0x30000>;
270 label = "boardconfig";
271 read-only;
272 };
273 };
274 };
275 };
276
277 &usb_phy0 {
278 status = "okay";
279 };
280
281 &usb_phy1 {
282 status = "okay";
283 };
284
285 &usb0 {
286 status = "okay";
287 vbus-supply = <&usb_vbus>;
288 };
289
290 &usb1 {
291 status = "okay";
292 vbus-supply = <&usb_vbus>;
293 };