ecb68e896eabbc8dbb6431d1a5df1ad94f878f65
[openwrt/staging/mkresin.git] / target / linux / lantiq / files-4.14 / arch / mips / boot / dts / falcon.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "lantiq,falcon";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 cpu@0 {
11 compatible = "mips,mips34kc";
12 reg = <0>;
13 };
14 };
15
16 aliases {
17 serial0 = &serial0;
18 serial1 = &serial1;
19 gpio0 = &gpio0;
20 gpio1 = &gpio1;
21 gpio2 = &gpio2;
22 gpio3 = &gpio3;
23 gpio4 = &gpio4;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29
30 clocks {
31 compatible = "simple-bus";
32
33 cpu_clk: cpu {
34 compatible = "fixed-clock";
35 #clock-cells = <0>;
36 clock-frequency = <400000000>;
37 clock-output-names = "cpu";
38 };
39
40 io_clk: io {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <200000000>;
44 clock-output-names = "io";
45 };
46
47 fpi_clk: fpi {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <100000000>;
51 clock-output-names = "fpi";
52 };
53 };
54
55 ebu_cs0: localbus@10000000 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "lantiq,localbus", "simple-bus";
59 reg = <0x10000000 0x4000000>;
60 ranges = <0x0 0x10000000 0x4000000>;
61 };
62 ebu_cs1: localbus@14000000 {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 compatible = "lantiq,localbus", "simple-bus";
66 reg = <0x14000000 0x4000000>;
67 ranges = <0x0 0x14000000 0x4000000>;
68 };
69
70 ebu@18000000 {
71 compatible = "lantiq,ebu-falcon";
72 reg = <0x18000000 0x100>;
73 };
74
75 sbs2@1D000000 {
76 #address-cells = <1>;
77 #size-cells = <1>;
78 compatible = "lantiq,sysb2", "simple-bus";
79 reg = <0x1D000000 0x1000000>;
80 ranges = <0x0 0x1D000000 0x1000000>;
81
82 clock_sysgpe: clock-controller@700000 {
83 compatible = "lantiq,sysgpe-falcon";
84 reg = <0x700000 0x100>;
85 #clock-cells = <1>;
86 };
87
88 mps@4000 {
89 compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100";
90 reg = <0x4000 0x1000>;
91 interrupt-parent = <&icu0>;
92 interrupts = <154 155>;
93 lantiq,mbx = <&mpsmbx>;
94 };
95
96 gpio0: gpio@810000 {
97 compatible = "lantiq,falcon-gpio";
98 gpio-controller;
99 #gpio-cells = <2>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
102 interrupt-parent = <&icu0>;
103 interrupts = <44>;
104 reg = <0x810000 0x80>;
105 clocks = <&clock_syseth 16>;
106 };
107
108 gpio2: gpio@810100 {
109 compatible = "lantiq,falcon-gpio";
110 gpio-controller;
111 #gpio-cells = <2>;
112 interrupt-controller;
113 #interrupt-cells = <2>;
114 interrupt-parent = <&icu0>;
115 interrupts = <46>;
116 reg = <0x810100 0x80>;
117 clocks = <&clock_syseth 17>;
118 };
119
120 clock_syseth: clock-controller@B00000 {
121 compatible = "lantiq,syseth-falcon";
122 reg = <0xB00000 0x100>;
123 #clock-cells = <1>;
124 };
125
126 pad@B01000 {
127 compatible = "lantiq,pad-falcon";
128 reg = <0xB01000 0x100>;
129 lantiq,bank = <0>;
130 clocks = <&clock_syseth 20>;
131 };
132
133 pad@B02000 {
134 compatible = "lantiq,pad-falcon";
135 reg = <0xB02000 0x100>;
136 lantiq,bank = <2>;
137 clocks = <&clock_syseth 21>;
138 };
139 };
140
141 fpi@1E000000 {
142 #address-cells = <1>;
143 #size-cells = <1>;
144 compatible = "lantiq,fpi", "simple-bus";
145 reg = <0x1E000000 0x1000000>;
146 ranges = <0x0 0x1E000000 0x1000000>;
147
148 serial1: serial@100B00 {
149 status = "disabled";
150 compatible = "lantiq,asc";
151 reg = <0x100B00 0x100>;
152 interrupt-parent = <&icu0>;
153 interrupts = <112 113 114>;
154 line = <1>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&asc1_pins>;
157 clocks = <&clock_sys1 11>;
158 };
159
160 serial0: serial@100C00 {
161 compatible = "lantiq,asc";
162 reg = <0x100C00 0x100>;
163 interrupt-parent = <&icu0>;
164 interrupts = <104 105 106>;
165 line = <0>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&asc0_pins>;
168 clocks = <&clock_sys1 12>;
169 };
170
171 spi: spi@100D00 {
172 status = "disabled";
173 compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc";
174 interrupts = <22 23 24 25>;
175 interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
176 #address-cells = <1>;
177 #size-cells = <0>;
178 reg = <0x100D00 0x100>;
179 interrupt-parent = <&icu0>;
180 clocks = <&clock_sys1 13>;
181 base_cs = <1>;
182 num_cs = <2>;
183 };
184
185 gptc@100E00 {
186 compatible = "lantiq,gptc-falcon";
187 reg = <0x100E00 0x100>;
188 };
189
190 i2c: i2c@200000 {
191 status = "disabled";
192 #address-cells = <1>;
193 #size-cells = <0>;
194 compatible = "lantiq,lantiq-i2c";
195 reg = <0x200000 0x10000>;
196 interrupt-parent = <&icu0>;
197 interrupts = <18 19 20 21>;
198 gpios = <&gpio1 7 0 &gpio1 8 0>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&i2c_pins>;
201 clocks = <&clock_sys1 14>;
202 };
203
204 gpio1: gpio@800100 {
205 compatible = "lantiq,falcon-gpio";
206 gpio-controller;
207 #gpio-cells = <2>;
208 interrupt-controller;
209 #interrupt-cells = <2>;
210 interrupt-parent = <&icu0>;
211 interrupts = <45>;
212 reg = <0x800100 0x100>;
213 clocks = <&clock_sys1 16>;
214 };
215
216 gpio3: gpio@800200 {
217 compatible = "lantiq,falcon-gpio";
218 gpio-controller;
219 #gpio-cells = <2>;
220 interrupt-controller;
221 #interrupt-cells = <2>;
222 interrupt-parent = <&icu0>;
223 interrupts = <47>;
224 reg = <0x800200 0x100>;
225 clocks = <&clock_sys1 17>;
226 };
227
228 gpio4: gpio@800300 {
229 compatible = "lantiq,falcon-gpio";
230 gpio-controller;
231 #gpio-cells = <2>;
232 interrupt-controller;
233 #interrupt-cells = <2>;
234 interrupt-parent = <&icu0>;
235 interrupts = <48>;
236 reg = <0x800300 0x100>;
237 clocks = <&clock_sys1 18>;
238 };
239
240 pad@800400 {
241 compatible = "lantiq,pad-falcon";
242 reg = <0x800400 0x100>;
243 lantiq,bank = <1>;
244 clocks = <&clock_sys1 20>;
245 };
246
247 pad@800500 {
248 compatible = "lantiq,pad-falcon";
249 reg = <0x800500 0x100>;
250 lantiq,bank = <3>;
251 clocks = <&clock_sys1 21>;
252 };
253
254 pad@800600 {
255 compatible = "lantiq,pad-falcon";
256 reg = <0x800600 0x100>;
257 lantiq,bank = <4>;
258 clocks = <&clock_sys1 22>;
259 };
260
261 status@802000 {
262 compatible = "lantiq,status-falcon";
263 reg = <0x802000 0x80>;
264 };
265
266 clock_sys1: clock-controller@F00000 {
267 compatible = "lantiq,sys1-falcon";
268 reg = <0xF00000 0x100>;
269 #clock-cells = <1>;
270 };
271 };
272
273 sbs0@1F000000 {
274 #address-cells = <1>;
275 #size-cells = <1>;
276 compatible = "simple-bus";
277 reg = <0x1F000000 0x400000>;
278 ranges = <0x0 0x1F000000 0x400000>;
279
280 mpsmbx: mpsmbx@200000 {
281 reg = <0x200000 0x200>;
282 };
283 };
284
285 sbs1@1F700000 {
286
287 };
288
289 biu@1F800000 {
290 #address-cells = <1>;
291 #size-cells = <1>;
292 compatible = "lantiq,biu", "simple-bus";
293 reg = <0x1F800000 0x800000>;
294 ranges = <0x0 0x1F800000 0x800000>;
295
296 icu0: icu@80200 {
297 #interrupt-cells = <1>;
298 interrupt-controller;
299 compatible = "lantiq,icu";
300 reg = <0x80200 0x28
301 0x80228 0x28
302 0x80250 0x28
303 0x80278 0x28
304 0x802a0 0x28>;
305 };
306
307 watchdog@803F0 {
308 compatible = "lantiq,wdt";
309 reg = <0x803F0 0x10>;
310 clocks = <&io_clk>; /* currently no effect */
311 };
312 };
313
314 pinctrl {
315 compatible = "lantiq,pinctrl-falcon";
316 pinctrl-names = "default";
317 pinctrl-0 = <&state_default>;
318
319 state_default: pinctrl0 {
320 /*ntr {
321 lantiq,groups = "ntr8k";
322 lantiq,function = "ntr";
323 };*/
324 hrst {
325 lantiq,groups = "hrst";
326 lantiq,function = "rst";
327 };
328 };
329
330 asc0_pins: asc0 {
331 asc0 {
332 lantiq,groups = "asc0";
333 lantiq,function = "asc";
334 };
335 };
336 asc1_pins: asc1 {
337 asc1 {
338 lantiq,groups = "asc1";
339 lantiq,function = "asc";
340 };
341 };
342 i2c_pins: i2c {
343 i2c {
344 lantiq,groups = "i2c";
345 lantiq,function = "i2c";
346 };
347 };
348 bootled_pins: bootled {
349 bootled {
350 lantiq,groups = "bootled";
351 lantiq,function = "led";
352 };
353 };
354 ntr_ntr8k: ntr8k {
355 ntr8k {
356 lantiq,groups = "ntr8k";
357 lantiq,function = "ntr";
358 };
359 };
360 ntr_pps: pps {
361 pps {
362 lantiq,groups = "pps";
363 lantiq,function = "ntr";
364 };
365 };
366 ntr_gpio: gpio {
367 gpio {
368 lantiq,pins = "io5";
369 lantiq,mux = <1>;
370 lantiq,output = <0>;
371 };
372 };
373 slic_pins: slic {
374 slic {
375 lantiq,groups = "slic";
376 lantiq,function = "slic";
377 };
378 };
379 };
380
381 pinselect-ntr {
382 compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr";
383 pinctrl-names = "ntr8k", "pps", "gpio";
384 pinctrl-0 = <&ntr_ntr8k>;
385 pinctrl-1 = <&ntr_pps>;
386 pinctrl-2 = <&ntr_gpio>;
387 };
388
389 pinselect-asc1 {
390 compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1";
391 pinctrl-names = "default", "asc1";
392 pinctrl-0 = <&slic_pins>;
393 pinctrl-1 = <&asc1_pins>;
394 };
395
396 };