package/boot/uboot-ar71xx/patches/040-no_extern_inline.patch

   1 --- a/include/asm-mips/io.h
   2 +++ b/include/asm-mips/io.h
   3 @@ -118,12 +118,12 @@ static inline void set_io_port_base(unsi
   4   * Change virtual addresses to physical addresses and vv.
   5   * These are trivial on the 1:1 Linux/MIPS mapping
   6   */
   7 -extern inline phys_addr_t virt_to_phys(volatile void * address)
   8 +static inline phys_addr_t virt_to_phys(volatile void * address)
   9  {
  10         return CPHYSADDR(address);
  11  }
  12
  13 -extern inline void * phys_to_virt(unsigned long address)
  14 +static inline void * phys_to_virt(unsigned long address)
  15  {
  16         return (void *)KSEG0ADDR(address);
  17  }
  18 @@ -131,12 +131,12 @@ extern inline void * phys_to_virt(unsign
  19  /*
  20   * IO bus memory addresses are also 1:1 with the physical address
  21   */
  22 -extern inline unsigned long virt_to_bus(volatile void * address)
  23 +static inline unsigned long virt_to_bus(volatile void * address)
  24  {
  25         return CPHYSADDR(address);
  26  }
  27
  28 -extern inline void * bus_to_virt(unsigned long address)
  29 +static inline void * bus_to_virt(unsigned long address)
  30  {
  31         return (void *)KSEG0ADDR(address);
  32  }
  33 @@ -150,12 +150,12 @@ extern unsigned long isa_slot_offset;
  34  extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
  35
  36  #if 0
  37 -extern inline void *ioremap(unsigned long offset, unsigned long size)
  38 +static inline void *ioremap(unsigned long offset, unsigned long size)
  39  {
  40         return __ioremap(offset, size, _CACHE_UNCACHED);
  41  }
  42
  43 -extern inline void *ioremap_nocache(unsigned long offset, unsigned long size)
  44 +static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
  45  {
  46         return __ioremap(offset, size, _CACHE_UNCACHED);
  47  }
  48 @@ -238,7 +238,7 @@ out:
  49   */
  50
  51  #define __OUT1(s) \
  52 -extern inline void __out##s(unsigned int value, unsigned int port) {
  53 +static inline void __out##s(unsigned int value, unsigned int port) {
  54
  55  #define __OUT2(m) \
  56  __asm__ __volatile__ ("s" #m "\t%0,%1(%2)"
  57 @@ -252,7 +252,7 @@ __OUT1(s##c_p) __OUT2(m) : : "r" (__iosw
  58         SLOW_DOWN_IO; }
  59
  60  #define __IN1(t,s) \
  61 -extern __inline__ t __in##s(unsigned int port) { t _v;
  62 +static inline t __in##s(unsigned int port) { t _v;
  63
  64  /*
  65   * Required nops will be inserted by the assembler
  66 @@ -267,7 +267,7 @@ __IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i
  67  __IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); SLOW_DOWN_IO; return __ioswab##w(_v); }
  68
  69  #define __INS1(s) \
  70 -extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
  71 +static inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
  72
  73  #define __INS2(m) \
  74  if (count) \
  75 @@ -295,7 +295,7 @@ __INS1(s##c) __INS2(m) \
  76         : "$1");}
  77
  78  #define __OUTS1(s) \
  79 -extern inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
  80 +static inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
  81
  82  #define __OUTS2(m) \
  83  if (count) \
  84 --- a/include/asm-mips/system.h
  85 +++ b/include/asm-mips/system.h
  86 @@ -23,7 +23,7 @@
  87  #include <linux/kernel.h>
  88  #endif
  89
  90 -extern __inline__ void
  91 +static inline void
  92  __sti(void)
  93  {
  94         __asm__ __volatile__(
  95 @@ -47,7 +47,7 @@ __sti(void)
  96   * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
  97   * no nops at all.
  98   */
  99 -extern __inline__ void
 100 +static inline void
 101  __cli(void)
 102  {
 103         __asm__ __volatile__(
 104 @@ -208,7 +208,7 @@ do { \
 105   * For 32 and 64 bit operands we can take advantage of ll and sc.
 106   * FIXME: This doesn't work for R3000 machines.
 107   */
 108 -extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
 109 +static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
 110  {
 111  #ifdef CONFIG_CPU_HAS_LLSC
 112         unsigned long dummy;