package/kernel/mac80211/patches/330-v4.18-0005-brcmfmac-add-hostready-indication.patch

   1 From 84ad327d18debe19b8d509059b61db445d048b02 Mon Sep 17 00:00:00 2001
   2 From: Franky Lin <franky.lin@broadcom.com>
   3 Date: Thu, 26 Apr 2018 12:16:50 +0200
   4 Subject: [PATCH] brcmfmac: add hostready indication
   5
   6 A hostready signal is introduced to inform firmware through mailbox
   7 doorbell1 when common ring initialized or D3 exited.
   8
   9 Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com>
  10 Signed-off-by: Franky Lin <franky.lin@broadcom.com>
  11 Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
  12 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
  13 ---
  14  drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c | 14 ++++++++++++--
  15  1 file changed, 12 insertions(+), 2 deletions(-)
  16
  17 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
  18 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
  19 @@ -105,7 +105,8 @@ static const struct brcmf_firmware_mappi
  20  #define BRCMF_PCIE_PCIE2REG_MAILBOXMASK                0x4C
  21  #define BRCMF_PCIE_PCIE2REG_CONFIGADDR         0x120
  22  #define BRCMF_PCIE_PCIE2REG_CONFIGDATA         0x124
  23 -#define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX                0x140
  24 +#define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_0      0x140
  25 +#define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_1      0x144
  26
  27  #define BRCMF_PCIE2_INTA                       0x01
  28  #define BRCMF_PCIE2_INTB                       0x02
  29 @@ -140,6 +141,7 @@ static const struct brcmf_firmware_mappi
  30  #define BRCMF_PCIE_SHARED_VERSION_MASK         0x00FF
  31  #define BRCMF_PCIE_SHARED_DMA_INDEX            0x10000
  32  #define BRCMF_PCIE_SHARED_DMA_2B_IDX           0x100000
  33 +#define BRCMF_PCIE_SHARED_HOSTRDY_DB1          0x10000000
  34
  35  #define BRCMF_PCIE_FLAGS_HTOD_SPLIT            0x4000
  36  #define BRCMF_PCIE_FLAGS_DTOH_SPLIT            0x8000
  37 @@ -782,6 +784,12 @@ static void brcmf_pcie_intr_enable(struc
  38                                BRCMF_PCIE_MB_INT_FN0_1);
  39  }
  40
  41 +static void brcmf_pcie_hostready(struct brcmf_pciedev_info *devinfo)
  42 +{
  43 +       if (devinfo->shared.flags & BRCMF_PCIE_SHARED_HOSTRDY_DB1)
  44 +               brcmf_pcie_write_reg32(devinfo,
  45 +                                      BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_1, 1);
  46 +}
  47
  48  static irqreturn_t brcmf_pcie_quick_check_isr(int irq, void *arg)
  49  {
  50 @@ -924,7 +932,7 @@ static int brcmf_pcie_ring_mb_ring_bell(
  51
  52         brcmf_dbg(PCIE, "RING !\n");
  53         /* Any arbitrary value will do, lets use 1 */
  54 -       brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_H2D_MAILBOX, 1);
  55 +       brcmf_pcie_write_reg32(devinfo, BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_0, 1);
  56
  57         return 0;
  58  }
  59 @@ -1728,6 +1736,7 @@ static void brcmf_pcie_setup(struct devi
  60         init_waitqueue_head(&devinfo->mbdata_resp_wait);
  61
  62         brcmf_pcie_intr_enable(devinfo);
  63 +       brcmf_pcie_hostready(devinfo);
  64         if (brcmf_attach(&devinfo->pdev->dev, devinfo->settings) == 0)
  65                 return;
  66
  67 @@ -1950,6 +1959,7 @@ static int brcmf_pcie_pm_leave_D3(struct
  68                 brcmf_pcie_select_core(devinfo, BCMA_CORE_PCIE2);
  69                 brcmf_bus_change_state(bus, BRCMF_BUS_UP);
  70                 brcmf_pcie_intr_enable(devinfo);
  71 +               brcmf_pcie_hostready(devinfo);
  72                 return 0;
  73         }
  74