brcm2708: rename target to bcm27xx
[openwrt/staging/wigyori.git] / target / linux / bcm27xx / patches-4.19 / 950-0807-tty-amba-pl011-Avoid-rare-write-when-full-error.patch
1 From 8ef5143f743a4e922fdf0029f81452d3d7003daf Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Wed, 29 Jan 2020 09:35:19 +0000
4 Subject: [PATCH] tty: amba-pl011: Avoid rare write-when-full error
5
6 Under some circumstances on BCM283x processors data loss can be
7 observed - a single byte missing from the TX output stream. These bytes
8 are always the last byte of a batch of 8 written from pl011_tx_chars
9 when from_irq is true, meaning that the FIFO full flag is not checked
10 before writing.
11
12 The transmit optimisation relies on the FIFO being half-empty when the
13 TX interrupt is raised. Instrumenting the driver further showed that
14 the failure case correlated with the TX FIFO full flag being set at the
15 point where the last byte was written to the data register, which
16 explains the data loss but not how the FIFO appeared to be prematurely
17 full. A possible explanation is that a FIFO write was in flight at the
18 time the interrupt was raised, but as yet there is no hypothesis as to
19 how this might occur.
20
21 In the absence of a clear understanding of the failure mechanism, avoid
22 the problem by checking the FIFO levels before writing the last byte of
23 the group, which will have minimal performance impact.
24
25 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
26 ---
27 drivers/tty/serial/amba-pl011.c | 4 ++++
28 1 file changed, 4 insertions(+)
29
30 --- a/drivers/tty/serial/amba-pl011.c
31 +++ b/drivers/tty/serial/amba-pl011.c
32 @@ -1444,6 +1444,10 @@ static bool pl011_tx_chars(struct uart_a
33 if (likely(from_irq) && count-- == 0)
34 break;
35
36 + if (likely(from_irq) && count == 0 &&
37 + pl011_read(uap, REG_FR) & UART01x_FR_TXFF)
38 + break;
39 +
40 if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq))
41 break;
42